From patchwork Tue May 22 16:34:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 136575 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp1853875lji; Tue, 22 May 2018 09:35:06 -0700 (PDT) X-Google-Smtp-Source: AB8JxZqfTANeJr6nSZiLfOsSOBufjW3hUNymD/R2j1CsmIFNmN1Hgrigej1+kW5fdqQkhCDPBmac X-Received: by 2002:a17:902:8ec4:: with SMTP id x4-v6mr25186555plo.370.1527006905921; Tue, 22 May 2018 09:35:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527006905; cv=none; d=google.com; s=arc-20160816; b=C4meZ+29ZamuXE4yqnHbLD97AH4tgcyYTxs4+QF3UtKCgnS444fBVQVBc1Bh5z8S1+ a3Yqamy/r1zUIWHk3iLyFRQp1uuxgdR22G4y9QlGr74GCzFX6iyd6NEScdq1E54WEXVL RH9KL3N2tSugrZXUUJVz6oP2HH3xoqSH92z9chBWanr54IxOxCuYOLZBRp4RTwEtJVbu Vk6L+Cs2jnybue9nThkb+nmSzx8RO8IUVvUnkpkqOfa3Imxnv2EcfDrsrb/JNqSizrR2 ISP5mvwE3/3Itf7fIjc8AYyOF5UNcLX1WyxG4VlIvWM7u/LcMM2H7Pu1A+rlYLKkmOxI QECA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=6tqErnT4CmsA1zvi6TtEUDSCP0TUFo2IRlpIGmyaJs0=; b=xwUoimj3pFkvh/tlQH1tukjBuCK9+4QdCZgmso1mOqOlhI7RDbTRexTom17ZgsBMLz aRzrcosXqcEcbFGloaDHOTFCpPc+mmsm3tnZh2+shsLGjawexpZ6+HnlbdbYtY60tTrz YrAhBEVEej2MqwEDz1HdnDiUhqIZb/Ew8/KnbOjjRTNbKUTPRs1dMoeSdROYV3+VBKgH hxqb9Ms0Qiob4mwBgS6MdDJFWAs07b/S4q4dkfyjiVRudrYGU8t5PxOG/C+RmqVtBEbj X3otxDhpV1Jucie5B3i5SNjydIkFQcOZjYz0uEF0X2nI+F3fIUqzd5aIqWjhzXcjS6YM z5Sw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=RbzH+V0p; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b125-v6si10064652pga.536.2018.05.22.09.35.05; Tue, 22 May 2018 09:35:05 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=RbzH+V0p; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751371AbeEVQfE (ORCPT + 5 others); Tue, 22 May 2018 12:35:04 -0400 Received: from mail-wm0-f67.google.com ([74.125.82.67]:56185 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751268AbeEVQfC (ORCPT ); Tue, 22 May 2018 12:35:02 -0400 Received: by mail-wm0-f67.google.com with SMTP id a8-v6so1397628wmg.5 for ; Tue, 22 May 2018 09:35:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=jCY7HdllF3uoKVQxynuUwz3hFkvwVQeFuvp3nW8oXu0=; b=RbzH+V0phGsz5enZaFTKlRp0CP99XJrAcULQWY4ZVyk6JQsldXlqFWPBtK2AcvxM/j SPXm4a4AM0tewTnHHZODdU9fyuMTDvQEnvBCOtqh2VeTYFc6cgsNWd8XnPt1ackR42HB K4KeosNdPiCeF+HEy9hYBkR9EIVIavA7LRmW/49expKatCCyHOa4zlfjOjNRty//FTbo xDQARzDNs97H6BJYJIKxiwz+M5oYWniUSgAMwfngOUeTGzkQaDuhHD+49EBp/EqQP+/Z wv6QcCDb/vk9vNUGaAK3EjdTh6/evy2m3Jl5q6PlCErwHsb3YIiPanNL2sTLJjLS1CoV kNMw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=jCY7HdllF3uoKVQxynuUwz3hFkvwVQeFuvp3nW8oXu0=; b=XBLmBl2XWQJZnrEMMClLRlSUTc9JBZMk+ofJ237016UIPI1h+YzHlhvWw8UdsvxvFE +sb46kEh87N+tteKsveOAYJRRy2BHtGNJZXrLa5Z6WQoAfApfNwy3u9vhBID6+4HcjLR NDj+EXNwsoeIJsR3/b3tL9vHzZSm75yW5Evt7s3jJM+b5mX6GPGApP7DyW9Xtt9e9VWz v7FcnhyWmQa0cWanzpc99tBRqWUhx9dpClKq8Cbmkzs7/qD+Kjbs/cBlyZc1EneRPcBp ee6Oe00qQ1RENnI8ia6LORALIeSYBgL6LMOFR9QWtATObwWHWcMJ4HmxQLpaO0u2z/Tu s/kw== X-Gm-Message-State: ALKqPwcNDuHTTnuiJbTYCMgVF9TfUhWQvLaYOkrGkax9sqNiYsnsMk7C stvOLBhS3yCH3z40Gi54kYXbqg== X-Received: by 2002:a1c:9e90:: with SMTP id h138-v6mr1862962wme.33.1527006901635; Tue, 22 May 2018 09:35:01 -0700 (PDT) Received: from boomer.baylibre.local ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id h8-v6sm294062wmc.16.2018.05.22.09.35.00 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 22 May 2018 09:35:01 -0700 (PDT) From: Jerome Brunet To: Neil Armstrong , Carlo Caione , Kevin Hilman Cc: Jerome Brunet , Michael Turquette , Stephen Boyd , linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 0/6] clk: meson: axg: add audio clock controller support Date: Tue, 22 May 2018 18:34:51 +0200 Message-Id: <20180522163457.13834-1-jbrunet@baylibre.com> X-Mailer: git-send-email 2.14.3 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The purpose of this patchset is to add support for the clock controller dedicated to the audio subsystem found on A113 based SoCs The series depends on the CLK_MUX_ROUND_CLOSEST fixes [merged in clk-next] and the duty cycle support [1] making their way into CCF. First patch is a clean-up of the meson clk Kconfig. Then, there is 3 clock provider drivers for clocks found in the audio The last 3 are for the clock controller itself. Changes since v1: [2] * Rebase clk-meson's next/drivers * Correct typo in documentation and squash DT patches [1]: https://lkml.kernel.org/r/20180420211141.28929-1-jbrunet@baylibre.com [2]: https://lkml.kernel.org/r/20180425163304.10852-1-jbrunet@baylibre.com Jerome Brunet (6): clk: meson: clean-up meson clock configuration clk: meson: add clk-phase clock driver clk: meson: add triple phase clock driver clk: meson: add axg audio sclk divider driver dt-bindings: clock: add meson axg audio clock controller bindings clk: meson: axg: add the audio clock controller driver .../bindings/clock/amlogic,axg-audio-clkc.txt | 56 ++ drivers/clk/meson/Kconfig | 28 +- drivers/clk/meson/Makefile | 3 + drivers/clk/meson/axg-audio.c | 845 +++++++++++++++++++++ drivers/clk/meson/axg-audio.h | 127 ++++ drivers/clk/meson/clk-phase.c | 63 ++ drivers/clk/meson/clk-triphase.c | 68 ++ drivers/clk/meson/clkc-audio.h | 28 + drivers/clk/meson/clkc.h | 8 + drivers/clk/meson/sclk-div.c | 243 ++++++ include/dt-bindings/clock/axg-audio-clkc.h | 94 +++ 11 files changed, 1554 insertions(+), 9 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.txt create mode 100644 drivers/clk/meson/axg-audio.c create mode 100644 drivers/clk/meson/axg-audio.h create mode 100644 drivers/clk/meson/clk-phase.c create mode 100644 drivers/clk/meson/clk-triphase.c create mode 100644 drivers/clk/meson/clkc-audio.h create mode 100644 drivers/clk/meson/sclk-div.c create mode 100644 include/dt-bindings/clock/axg-audio-clkc.h -- 2.14.3 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html