| Message ID | 20171211050704.20621-1-joel@jms.id.au |
|---|---|
| Headers | show |
| Series | ARM: dts: aspeed: updates and new machines | expand |
On Mon, Dec 11, 2017 at 6:06 AM, Joel Stanley <joel@jms.id.au> wrote: > These are used to by the device tree to map pin numbers to constants > required by the GPIO bindings. > + > +#define ASPEED_GPIO_PORT_A 0 > +#define ASPEED_GPIO_PORT_B 1 > +#define ASPEED_GPIO_PORT_C 2 > +#define ASPEED_GPIO_PORT_D 3 > +#define ASPEED_GPIO_PORT_E 4 > +#define ASPEED_GPIO_PORT_F 5 > +#define ASPEED_GPIO_PORT_G 6 > +#define ASPEED_GPIO_PORT_H 7 > +#define ASPEED_GPIO_PORT_I 8 > +#define ASPEED_GPIO_PORT_J 9 > +#define ASPEED_GPIO_PORT_K 10 > +#define ASPEED_GPIO_PORT_L 11 > +#define ASPEED_GPIO_PORT_M 12 > +#define ASPEED_GPIO_PORT_N 13 > +#define ASPEED_GPIO_PORT_O 14 > +#define ASPEED_GPIO_PORT_P 15 > +#define ASPEED_GPIO_PORT_Q 16 > +#define ASPEED_GPIO_PORT_R 17 > +#define ASPEED_GPIO_PORT_S 18 > +#define ASPEED_GPIO_PORT_T 19 > +#define ASPEED_GPIO_PORT_U 20 > +#define ASPEED_GPIO_PORT_V 21 > +#define ASPEED_GPIO_PORT_W 22 > +#define ASPEED_GPIO_PORT_X 23 > +#define ASPEED_GPIO_PORT_Y 24 > +#define ASPEED_GPIO_PORT_Z 25 > +#define ASPEED_GPIO_PORT_AA 26 > +#define ASPEED_GPIO_PORT_AB 27 > +#define ASPEED_GPIO_PORT_AC 28 This looks like a 1:1 mapping, wouldn't it be easier to just describe it in the binding document? Arnd -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Mon, Dec 11, 2017 at 6:06 AM, Joel Stanley <joel@jms.id.au> wrote: > This should have always been 8. > > Signed-off-by: Joel Stanley <joel@jms.id.au> As this is a bugfix, should we backport it to stable kernels? When you fix a bug, I generally recommend including a 'Fixes' tag with the commit ID of the patch that introduced the problem, and either a 'Cc: stable@vger.kernel.org' tag if you want it backported, or an explanation in the changelog why it should not get backported. This really helps Greg and the other stable maintainers trying to make a decision what to backport and what not. Arnd -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Mon, Dec 11, 2017 at 6:06 AM, Joel Stanley <joel@jms.id.au> wrote: > The existing device trees use fixed-clocks in order to boot without a > clk driver. The newly added clk driver provides proper clock support, > including gating, so we move the device trees over to properly request > clocks. > > Signed-off-by: Joel Stanley <joel@jms.id.au> Can you clarify here whether this will break running old kernels with new DT files or vice versa, and why this is ok here? I assume you have thought about it carefully, but I'd still like to document every time we intentionally break compatibility like this. It looks like you too care to merge the driver changes and the DT binding change first, so we don't get any bisection problems. What I'm not completely clear about is the difference between the "aspeed,g4-scu" binding and the "aspeed,ast2400-scu" binding. They are listed as equal in Documentation/devicetree/bindings/mfd/aspeed-scu.txt, so why do you change it here? Arnd -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Mon, Dec 11, 2017 at 6:26 PM, Arnd Bergmann <arnd@arndb.de> wrote: > On Mon, Dec 11, 2017 at 6:06 AM, Joel Stanley <joel@jms.id.au> wrote: >> These are used to by the device tree to map pin numbers to constants >> required by the GPIO bindings. >> + >> +#define ASPEED_GPIO_PORT_A 0 >> +#define ASPEED_GPIO_PORT_B 1 >> +#define ASPEED_GPIO_PORT_C 2 >> +#define ASPEED_GPIO_PORT_D 3 >> +#define ASPEED_GPIO_PORT_E 4 >> +#define ASPEED_GPIO_PORT_F 5 >> +#define ASPEED_GPIO_PORT_G 6 >> +#define ASPEED_GPIO_PORT_H 7 >> +#define ASPEED_GPIO_PORT_I 8 >> +#define ASPEED_GPIO_PORT_J 9 >> +#define ASPEED_GPIO_PORT_K 10 >> +#define ASPEED_GPIO_PORT_L 11 >> +#define ASPEED_GPIO_PORT_M 12 >> +#define ASPEED_GPIO_PORT_N 13 >> +#define ASPEED_GPIO_PORT_O 14 >> +#define ASPEED_GPIO_PORT_P 15 >> +#define ASPEED_GPIO_PORT_Q 16 >> +#define ASPEED_GPIO_PORT_R 17 >> +#define ASPEED_GPIO_PORT_S 18 >> +#define ASPEED_GPIO_PORT_T 19 >> +#define ASPEED_GPIO_PORT_U 20 >> +#define ASPEED_GPIO_PORT_V 21 >> +#define ASPEED_GPIO_PORT_W 22 >> +#define ASPEED_GPIO_PORT_X 23 >> +#define ASPEED_GPIO_PORT_Y 24 >> +#define ASPEED_GPIO_PORT_Z 25 >> +#define ASPEED_GPIO_PORT_AA 26 >> +#define ASPEED_GPIO_PORT_AB 27 >> +#define ASPEED_GPIO_PORT_AC 28 > > This looks like a 1:1 mapping, wouldn't it be easier to just describe > it in the binding document? You're right, it is a linear mapping. We use it so references to GPIO numbers are human readable in the device tree: #define ASPEED_GPIO(port, offset) \ ((ASPEED_GPIO_PORT_##port * 8) + offset) can be used: identify { gpios = <&gpio ASPEED_GPIO(A, 2) GPIO_ACTIVE_LOW>; }; We find that has cut down on mistakes in calculating offsets into GPIO banks. Cheers, Joel -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Mon, Dec 11, 2017 at 6:28 PM, Arnd Bergmann <arnd@arndb.de> wrote: > On Mon, Dec 11, 2017 at 6:06 AM, Joel Stanley <joel@jms.id.au> wrote: >> This should have always been 8. >> >> Signed-off-by: Joel Stanley <joel@jms.id.au> > > As this is a bugfix, should we backport it to stable kernels? When you > fix a bug, > I generally recommend including a 'Fixes' tag with the commit ID of the patch > that introduced the problem, and either a 'Cc: stable@vger.kernel.org' tag > if you want it backported, or an explanation in the changelog why it should > not get backported. This really helps Greg and the other stable maintainers > trying to make a decision what to backport and what not. We could do this, and I generally follow the practice of adding Fixes tags. I hadn't because without an upstream clock driver, the Aspeed port is not usable by anyone without making modifications. We're really depending on getting that code merged. I will send it as a fix to 4.15. Do you mind taking individual patches for the arm dt tree, or would you prefer a pull request? Cheers, Joel -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Sun, Dec 10, 2017 at 11:07 PM, Joel Stanley <joel@jms.id.au> wrote: > The Witherspoon BMC is an ASPEED ast2500 based BMC that is part of an > OpenPower Power9 server. > > This adds the device tree description for most upstream components. It > is a squashed commit from the OpenBMC kernel tree. > > Signed-off-by: Brandon Wyman <bjwyman@gmail.com> > Signed-off-by: Matt Spinler <spinler@us.ibm.com> > Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com> > Signed-off-by: Edward A. James <eajames@us.ibm.com> > Signed-off-by: Cédric Le Goater <clg@kaod.org> > Signed-off-by: Andrew Jeffery <andrew@aj.id.au> > Signed-off-by: Joel Stanley <joel@jms.id.au> > --- > arch/arm/boot/dts/Makefile | 4 +- > arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts | 547 +++++++++++++++++++++++ > 2 files changed, 550 insertions(+), 1 deletion(-) > create mode 100644 arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile > index 5d1e9d37bf3a..15a9207319c1 100644 > --- a/arch/arm/boot/dts/Makefile > +++ b/arch/arm/boot/dts/Makefile > @@ -1104,5 +1104,7 @@ dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb > dtb-$(CONFIG_ARCH_ASPEED) += \ > aspeed-ast2500-evb.dtb \ > aspeed-bmc-opp-palmetto.dtb \ > - aspeed-bmc-opp-romulus.dtb > + aspeed-bmc-opp-romulus.dtb \ > + aspeed-bmc-opp-witherspoon.dtb > + > endif > diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts b/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts > new file mode 100644 > index 000000000000..9a0937512e5b > --- /dev/null > +++ b/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts > @@ -0,0 +1,547 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/dts-v1/; > +#include "aspeed-g5.dtsi" > +#include <dt-bindings/leds/leds-pca955x.h> > + > +/ { > + model = "Witherspoon BMC"; > + compatible = "ibm,witherspoon-bmc", "aspeed,ast2500"; > + > + chosen { > + stdout-path = &uart5; > + bootargs = "console=ttyS4,115200 earlyprintk"; > + }; > + > + memory { > + reg = <0x80000000 0x20000000>; > + }; > + > + reserved-memory { > + #address-cells = <1>; > + #size-cells = <1>; > + ranges; > + > + flash_memory: region@98000000 { > + no-map; > + reg = <0x98000000 0x04000000>; /* 64M */ > + }; > + }; > + > + gpio-keys-polled { > + compatible = "gpio-keys-polled"; > + #address-cells = <1>; > + #size-cells = <0>; > + poll-interval = <1000>; > + > + fan0-presence { > + label = "fan0-presence"; > + gpios = <&pca0 4 GPIO_ACTIVE_LOW>; > + linux,code = <4>; > + }; > + > + fan1-presence { > + label = "fan1-presence"; > + gpios = <&pca0 5 GPIO_ACTIVE_LOW>; > + linux,code = <5>; > + }; > + > + fan2-presence { > + label = "fan2-presence"; > + gpios = <&pca0 6 GPIO_ACTIVE_LOW>; > + linux,code = <6>; > + }; > + > + fan3-presence { > + label = "fan3-presence"; > + gpios = <&pca0 7 GPIO_ACTIVE_LOW>; > + linux,code = <7>; > + }; > + }; > + > + leds { > + compatible = "gpio-leds"; > + > + fan0 { > + retain-state-shutdown; > + default-state = "keep"; > + gpios = <&pca0 0 GPIO_ACTIVE_LOW>; > + }; > + > + fan1 { > + retain-state-shutdown; > + default-state = "keep"; > + gpios = <&pca0 1 GPIO_ACTIVE_LOW>; > + }; > + > + fan2 { > + retain-state-shutdown; > + default-state = "keep"; > + gpios = <&pca0 2 GPIO_ACTIVE_LOW>; > + }; > + > + fan3 { > + retain-state-shutdown; > + default-state = "keep"; > + gpios = <&pca0 3 GPIO_ACTIVE_LOW>; > + }; > + > + front-fault { > + retain-state-shutdown; > + default-state = "keep"; > + gpios = <&pca0 13 GPIO_ACTIVE_LOW>; > + }; > + > + front-power { > + retain-state-shutdown; > + default-state = "keep"; > + gpios = <&pca0 14 GPIO_ACTIVE_LOW>; > + }; > + > + front-id { > + retain-state-shutdown; > + default-state = "keep"; > + gpios = <&pca0 15 GPIO_ACTIVE_LOW>; > + }; > + > + rear-fault { > + gpios = <&gpio ASPEED_GPIO(N, 2) GPIO_ACTIVE_LOW>; > + }; > + > + rear-id { > + gpios = <&gpio ASPEED_GPIO(N, 4) GPIO_ACTIVE_LOW>; > + }; > + > + rear-power { > + gpios = <&gpio ASPEED_GPIO(N, 3) GPIO_ACTIVE_LOW>; > + }; > + > + power-button { > + gpios = <&gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_LOW>; > + }; > + }; > + > + fsi: gpio-fsi { > + compatible = "fsi-master-gpio", "fsi-master"; > + #address-cells = <2>; > + #size-cells = <0>; > + > + clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>; > + data-gpios = <&gpio ASPEED_GPIO(E, 0) GPIO_ACTIVE_HIGH>; > + mux-gpios = <&gpio ASPEED_GPIO(A, 6) GPIO_ACTIVE_HIGH>; > + enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>; > + trans-gpios = <&gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_HIGH>; > + }; > + > + iio-hwmon-dps310 { > + compatible = "iio-hwmon"; > + io-channels = <&dps 0>; > + }; > + > + iio-hwmon-bmp280 { > + compatible = "iio-hwmon"; > + io-channels = <&bmp 1>; > + }; > + > +}; > + > +&fmc { > + status = "okay"; > + > + flash@0 { > + status = "okay"; > + label = "bmc"; > + m25p,fast-read; > +#include "openbmc-flash-layout.dtsi" > + }; > + > + flash@1 { > + status = "okay"; > + label = "alt"; > + m25p,fast-read; > + }; > +}; > + > +&spi1 { > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_spi1_default>; > + > + flash@0 { > + status = "okay"; > + label = "pnor"; > + m25p,fast-read; > + }; > +}; > + > +&uart1 { > + /* Rear RS-232 connector */ > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_txd1_default > + &pinctrl_rxd1_default > + &pinctrl_nrts1_default > + &pinctrl_ndtr1_default > + &pinctrl_ndsr1_default > + &pinctrl_ncts1_default > + &pinctrl_ndcd1_default > + &pinctrl_nri1_default>; > +}; > + > +&uart2 { > + /* APSS */ > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>; > +}; > + > +&uart5 { > + status = "okay"; > +}; > + > +&lpc_ctrl { > + status = "okay"; > + memory-region = <&flash_memory>; > + flash = <&spi1>; > +}; > + > +&mac0 { > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_rmii1_default>; > + use-ncsi; > +}; > + > +&i2c2 { > + status = "okay"; > + > + /* MUX -> > + * Samtec 1 > + * Samtec 2 > + */ > +}; > + > +&i2c3 { > + status = "okay"; > + > + bmp: bmp280@77 { > + compatible = "bosch,bmp280"; > + reg = <0x77>; > + #io-channel-cells = <1>; > + }; > + > + max31785@52 { > + compatible = "maxim,max31785a"; > + reg = <0x52>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + > + dps: dps310@76 { > + compatible = "infineon,dps310"; > + reg = <0x76>; > + #io-channel-cells = <0>; > + }; > + > + pca0: pca9552@60 { > + compatible = "nxp,pca9552"; > + reg = <0x60>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + gpio-controller; > + #gpio-cells = <2>; > + > + gpio@0 { > + reg = <0>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@1 { > + reg = <1>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@2 { > + reg = <2>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@3 { > + reg = <3>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@4 { > + reg = <4>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@5 { > + reg = <5>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@6 { > + reg = <6>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@7 { > + reg = <7>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@8 { > + reg = <8>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@9 { > + reg = <9>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@10 { > + reg = <10>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@11 { > + reg = <11>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@12 { > + reg = <12>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@13 { > + reg = <13>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@14 { > + reg = <14>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@15 { > + reg = <15>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + }; > + > + power-supply@68 { > + compatible = "ibm,cffps1"; > + reg = <0x68>; > + }; > + > + power-supply@69 { > + compatible = "ibm,cffps1"; > + reg = <0x69>; > + }; > +}; > + > +&i2c4 { > + status = "okay"; > + > + tmp423a@4c { > + compatible = "ti,tmp423"; > + reg = <0x4c>; > + }; > + > + ir35221@70 { > + compatible = "infineon,ir35221"; > + reg = <0x70>; > + }; > + > + ir35221@71 { > + compatible = "infineon,ir35221"; > + reg = <0x71>; > + }; > +}; > + > + > +&i2c5 { > + status = "okay"; > + > + tmp423a@4c { > + compatible = "ti,tmp423"; > + reg = <0x4c>; > + }; > + > + ir35221@70 { > + compatible = "infineon,ir35221"; > + reg = <0x70>; > + }; > + > + ir35221@71 { > + compatible = "infineon,ir35221"; > + reg = <0x71>; > + }; > +}; > + > +&i2c9 { > + status = "okay"; > + > + tmp275@4a { > + compatible = "ti,tmp275"; > + reg = <0x4a>; > + }; > +}; > + > +&i2c10 { > + /* MUX > + * -> PCIe Slot 3 > + * -> PCIe Slot 4 > + */ > + status = "okay"; > +}; > + > +&i2c11 { > + status = "okay"; > + > + pca9552: pca9552@60 { > + compatible = "nxp,pca9552"; > + reg = <0x60>; > + #address-cells = <1>; > + #size-cells = <0>; > + gpio-controller; > + #gpio-cells = <2>; > + > + gpio-line-names = "PS_SMBUS_RESET_N", "APSS_RESET_N", > + "GPU0_TH_OVERT_N_BUFF", "GPU1_TH_OVERT_N_BUFF", > + "GPU2_TH_OVERT_N_BUFF", "GPU3_TH_OVERT_N_BUFF", > + "GPU4_TH_OVERT_N_BUFF", "GPU5_TH_OVERT_N_BUFF", > + "GPU0_PWR_GOOD_BUFF", "GPU1_PWR_GOOD_BUFF", > + "GPU2_PWR_GOOD_BUFF", "GPU3_PWR_GOOD_BUFF", > + "GPU4_PWR_GOOD_BUFF", "GPU5_PWR_GOOD_BUFF", > + "12V_BREAKER_FLT_N", "THROTTLE_UNLATCHED_N"; > + > + gpio@0 { > + reg = <0>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@1 { > + reg = <1>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@2 { > + reg = <2>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@3 { > + reg = <3>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@4 { > + reg = <4>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@5 { > + reg = <5>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@6 { > + reg = <6>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@7 { > + reg = <7>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@8 { > + reg = <8>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@9 { > + reg = <9>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@10 { > + reg = <10>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@11 { > + reg = <11>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@12 { > + reg = <12>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@13 { > + reg = <13>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@14 { > + reg = <14>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + > + gpio@15 { > + reg = <15>; > + type = <PCA955X_TYPE_GPIO>; > + }; > + }; > + > + rtc@32 { > + compatible = "epson,rx8900"; > + reg = <0x32>; > + }; > + > + eeprom@51 { > + compatible = "atmel,24c64"; > + reg = <0x51>; > + }; > + > + ucd90160@64 { > + compatible = "ti,ucd90160"; > + reg = <0x64>; > + }; > +}; > + > +&i2c12 { > + status = "okay"; > +}; > + > +&i2c13 { > + status = "okay"; > +}; > + > +&vuart { > + status = "okay"; > +}; > + > +&gfx { > + status = "okay"; > +}; > + > +&pinctrl { > + aspeed,external-nodes = <&gfx &lhc>; > +}; > + > +&wdt1 { > + aspeed,reset-type = "none"; > + aspeed,external-signal; > + aspeed,ext-push-pull; > + aspeed,ext-active-high; > + > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_wdtrst1_default>; > +}; > -- > 2.14.1 > Reviewed-by: Brandon Wyman <bjwyman@gmail.com> -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html