From patchwork Tue Oct 17 12:47:02 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 116080 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp4848712qgn; Tue, 17 Oct 2017 05:47:23 -0700 (PDT) X-Google-Smtp-Source: AOwi7QAr7Uu4OOn2o+AfAwYFHhQKne68ngAo2jCYYeucYOkyjQ7/CESkk1y/EB3db6NCsEoFDUJ6 X-Received: by 10.159.218.1 with SMTP id v1mr11529388plp.299.1508244443581; Tue, 17 Oct 2017 05:47:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508244443; cv=none; d=google.com; s=arc-20160816; b=aicKl0obfpRSr447g/mLAFZKrzLqDosvipPIbhYRpps0PJK/Ju5ZRq7wbrSF6G+sLF 4UC6/w91S+PGAO36j6Mm+Mv/dkItGQ+uFZqQ5Pz6R1wkLqRPvHWXKcqxbdid5u7phGQn IvWSy8fiwp37J3MlQaAsuVl+Enp8e+IRlfokrDnO6IshBTVEbwSrp9L6LdRvdN2sX+Dn IYO926GyOYUwpT4P2aw9ZMXyPtR83YindTRMdzQl/vXn4krsK4nbYFYzGX4Ad4KMtUjV dFYc87yq5hUubgDA+QcdiQwiVTxJin7PV4vm39MSPEbHKFu71E08yy6l/mfFDHxj3Q/y CJMg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:arc-authentication-results; bh=RjMYY7QJZwG8n/pG2zLezw0uGcActWideE47Grd9bow=; b=jGidBXJqKHjIXKkeYGiqzE3mlQnN1RiMFS8mZ+vSjRJyDg/2gjKWyZw5LOvjnzpJAf dhAjOYge+tiP7Pt0t/mL0XhgtfxN5R5N+QZtUKPI9EhWIbMlsWTUjmR8obnQHuKJ5R04 0UCoIuLCsziTcsx0LjYAZnt05cvUuJVfaEriw56IUIXOk9SVzxrXYFutH47MWWZsD88l qwY6L6FhIrN4UTDhfjs1GcYMtPIkyxfHmejNSb0HrKkksIAMpmjBDak98CdIXOmmHo35 ++gXLFvN+nUoZSIb8B8OgGHtTsNNPACRPJiXMBBTD3OB4TroW8C2NQXULn2oVxBglMkm q3UA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d19si5456807pgn.613.2017.10.17.05.47.23; Tue, 17 Oct 2017 05:47:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1761880AbdJQMrW (ORCPT + 6 others); Tue, 17 Oct 2017 08:47:22 -0400 Received: from mx2.suse.de ([195.135.220.15]:33967 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755487AbdJQMrV (ORCPT ); Tue, 17 Oct 2017 08:47:21 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id D4E77AC73; Tue, 17 Oct 2017 12:47:19 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: Thomas Gleixner , Jason Cooper , Marc Zyngier , linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, Bizon , Roc He , =?utf-8?b?6JKL5Li955C0?= , =?utf-8?q?Andreas_F=C3=A4rber?= , devicetree@vger.kernel.org, Andrew Lunn Subject: [PATCH v3 0/5] arm64: Realtek RTD1195/RTD1295 IRQ mux Date: Tue, 17 Oct 2017 14:47:02 +0200 Message-Id: <20171017124708.6242-1-afaerber@suse.de> X-Mailer: git-send-email 2.13.6 MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hello, This series adds two IRQ muxes for the Realtek RTD1295 and RTD1195 SoCs. The implementation is based on register offsets seen in the vendor DT, split up into two separate nodes, as well as code from QNAP's rtk119x and Synology's RTD1293/96 GPL code dumps. v3 does various cleanups, renames variables, reworks unmask vs. enable/disable and adds an isr/scpu_int_en map as well as full RTD1195 support. More experimental patches at: https://github.com/afaerber/linux/commits/rtd1295-next Have a lot of fun! Cheers, Andreas v2 -> v3: * Rebased, adding nodes to rtd129x.dtsi instead of rtd1295.dtsi * Adopted {readl,writel}_relaxed() (Marc) * Adopted spin_lock_irqsave() (Marc) * Implemented RTD1195 * Implemented mapping for non-linear bits such as i2c3 v1 -> v2: * Rebased, avoiding dependency on reset series for DT nodes * Don't forward set_affinity to GIC (Marc) * Added more spinlocks (Marc) * Code cleanups * Investigated quirk * Fixed spinlock initialization (Andrew) Cc: Thomas Gleixner Cc: Jason Cooper Cc: Marc Zyngier Cc: Roc He Cc: 蒋丽琴 Cc: devicetree@vger.kernel.org Cc: Andrew Lunn Andreas Färber (5): dt-bindings: interrupt-controller: Add Realtek RTD1295 irqchip: Add Realtek RTD1295 mux driver arm64: dts: realtek: Add irq mux to RTD129x dt-bindings: interrupt-controller: Document RTD1195 irqchip: rtd119x: Add RTD1195 definitions .../interrupt-controller/realtek,rtd119x-mux.txt | 25 ++ arch/arm64/boot/dts/realtek/rtd129x.dtsi | 22 ++ drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-rtd119x-mux.c | 388 +++++++++++++++++++++ 4 files changed, 436 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/realtek,rtd119x-mux.txt create mode 100644 drivers/irqchip/irq-rtd119x-mux.c -- 2.13.6 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html