From patchwork Mon Aug 28 18:04:35 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 111175 Delivered-To: patch@linaro.org Received: by 10.140.95.112 with SMTP id h103csp131660qge; Mon, 28 Aug 2017 11:04:48 -0700 (PDT) X-Received: by 10.98.209.88 with SMTP id t24mr1278334pfl.223.1503943488349; Mon, 28 Aug 2017 11:04:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1503943488; cv=none; d=google.com; s=arc-20160816; b=IfVIg52XWiywy0hCPIi3M+/AamFReqp1/DcYM0AT72klAHnqs+fo7o6wjgZPdk7O++ lHENrh2g3tKNa92euj6HQ5i7cJ9l7aM/5WAq5VYzSyW8mp1l+MddI2Ww2ofqHsAShjen zwkZjmYi3ETG76QEHBc23M2+/a4s92WeO4xyodWSt+GMiqf0NyuHfh+sm5FxT0ED85wS AAAj4MG4oM8Crtc+tOKhs5J8HPWZOFgR1iCi4Wi2shVJS7W4HIOmebLLkXT1UeG7VRxV MUs4ZbmofORUvSgXLAZx9D6K//cbgjHUV628VGncc1g7ctekKDh5N7G3EhwabdZeabWK qvpw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=nSlQSwVAi/J5jp99fcjHn178Kcso8gmDU83QaC/9mB4=; b=mk5PUtvKnQu57m8XHf0dQdBVMYb5t1CzneNQZWOQsXEIqDpSsRFyuCvoEbvqjoVtLE c84Ltp0H3R7IJ/2AY0l20oCp/lcNNHk9aBljKOyATRd3kUtskww+aN0Qsx89RicH3GI5 obe23c26jKOYlyQh8jq9rxE1ulzvuCKOMOyVx5Puz2A99YWN7ETiUlWrlJiuK8CZo+to fcRgQWxiMx8w6gmv+7yht5OnBl8Ef/hE7jwtmGWJxUXDSbpwTBOzHjezE4+kM+APqlHK EnS6eajk3p5WyRSa9szQYAwOS62nPAZqTmw2VVCW1gjmRdr/it4szJy5d86QF6Mjdxb0 tddg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=aNG8TsBD; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b8si722356ple.299.2017.08.28.11.04.48; Mon, 28 Aug 2017 11:04:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=aNG8TsBD; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751257AbdH1SEr (ORCPT + 6 others); Mon, 28 Aug 2017 14:04:47 -0400 Received: from mail-wm0-f42.google.com ([74.125.82.42]:37056 "EHLO mail-wm0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751182AbdH1SEq (ORCPT ); Mon, 28 Aug 2017 14:04:46 -0400 Received: by mail-wm0-f42.google.com with SMTP id u26so8395985wma.0 for ; Mon, 28 Aug 2017 11:04:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=Xca2PJMusoDEEGzg9Li5WtKxLZJSdXRPGQOuH9t4uhE=; b=aNG8TsBDom+W2UbKYPUGxAAiMvAsC8hVwsL3HiqFNMoYFOkh5D1Qc3SiUg13dRiDIZ r5ozJe360oXBSbdzvx5GuF+c5O/TpVqJojVMWcysD/RDUm4VTSdx7SMdJj1Veo7UKEb1 ffTkCJtDlNz6Q//w7aKpKGGI/Amp58+a3qp3s= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=Xca2PJMusoDEEGzg9Li5WtKxLZJSdXRPGQOuH9t4uhE=; b=EII7CE4a3syi5Y5H8bkLdkxZhqs7E6P3cC3JVaRVJqLApFtSmRscKb3dFzid1BWTlI oSPLuj1Z88tapmfmKA/NxBZmjuaN7Op1Nh25tfEjDicSkesnOOVgo0E4XT0kUAAWFljZ ETDm2jcK90NQ3vBCyT9g8FXqFWqsjeSTSIDVK49ent9mgy2DgvLVf40yszacilvJzQtX FrWBlvcSHN8Q5cDbAN4fy8WU9UeBZC64gfo6efTArK1JF2Qrf1IvdOTOCoLuhr9PyreD 5McW7P69LT1oQFdGTos0UMKKNoRA2tv/XGqVhGeIHwz3+l3eQoSBAibkUobAa5eD5RYI 9zLw== X-Gm-Message-State: AHYfb5ir7ypNaU4kRB5ofhxBACpIM6+Kjyd2z/dXe9ZGr+3Jq1aKI0XB 9tP3Z6MZzzgtr5ie X-Received: by 10.28.20.67 with SMTP id 64mr925707wmu.100.1503943485035; Mon, 28 Aug 2017 11:04:45 -0700 (PDT) Received: from localhost.localdomain ([105.133.189.215]) by smtp.gmail.com with ESMTPSA id i22sm1335922wrf.18.2017.08.28.11.04.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 28 Aug 2017 11:04:44 -0700 (PDT) From: Ard Biesheuvel To: linux-pci@vger.kernel.org Cc: devicetree@vger.kernel.org, mw@semihalf.com, Ard Biesheuvel , Leif Lindholm , Graeme Gregory , Bjorn Helgaas , Jingoo Han , Joao Pinto , Rob Herring Subject: [PATCH v3 0/2] pci: add support for firmware initialized designware RCs Date: Mon, 28 Aug 2017 19:04:35 +0100 Message-Id: <20170828180437.2646-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org UEFI based systems incorporating a Synopsys Designware PCIe controller in RC mode will typically configure it before entering the OS. If this configuration is fully static and ECAM compliant, there is no need to expose particulars of the device to the OS, and we can simply describe it as "pci-host-ecam-generic". However, the Synopsys IP may be synthesized in a way where a quirk is needed for config space accesses to the first bus. It makes little sense to instantiate yet another pcie-designware driver that contains all the low level setup code, but it is also not justified to add quirks handling to the generic ECAM driver. So instead, create a variant of the generic ECAM driver that filters config space accesses directed at device #1 and up on the first bus. v3: - use SoC specific compatible strings - drop MSI patch [for now], since it turns out we may not need it v2: - use dev->fwnode directly - replace an instance of pr_err with dev_err, and clarify the error message - fix Kconfig/Makefile dependency errors reported by kbuild Cc: Leif Lindholm Cc: Graeme Gregory Cc: Bjorn Helgaas Cc: Jingoo Han Cc: Joao Pinto Cc: Rob Herring Ard Biesheuvel (2): pci: designware: add driver for DWC controller in ECAM shift mode dt-bindings: designware: add binding for Designware PCIe in ECAM mode Documentation/devicetree/bindings/pci/designware-pcie-ecam.txt | 42 +++++++++++ drivers/pci/dwc/Kconfig | 11 +++ drivers/pci/dwc/Makefile | 1 + drivers/pci/dwc/pcie-designware-ecam.c | 77 ++++++++++++++++++++ 4 files changed, 131 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/designware-pcie-ecam.txt create mode 100644 drivers/pci/dwc/pcie-designware-ecam.c -- 2.11.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Tested-by: Marcin Wojtas