mbox series

[0/8] Few audio fixes on Tegra platforms

Message ID 1687433656-7892-1-git-send-email-spujar@nvidia.com
Headers show
Series Few audio fixes on Tegra platforms | expand

Message

Sameer Pujar June 22, 2023, 11:34 a.m. UTC 
This series fixes some of the issues which were observed during an attempt to
enhance automated test coverage on Jetson AGX Orin. Below is a short summary
of the issues and fixes:

  * Sample rate coversion failures above 48kHz.
  * AMX and ADX test cases failures due to incorrect byte mask.
  * Atomic sleep in RT5640 codec which is present on Jetson AGX Orin.
  * AHUB clock fixes on Tegra234 and previous chips.
  * Minor cleanups in ASRC and AHUB driver.


Sameer Pujar (4):
  ASoC: rt5640: Fix sleep in atomic context
  ASoC: tegra: Use normal system sleep for ASRC
  ASoC: tegra: Remove stale comments in AHUB
  arm64: tegra: Update AHUB clock parent and rate

Sheetal (4):
  ASoC: tegra: Fix SFC conversion for few rates
  ASoC: tegra: Fix AMX byte map
  ASoC: tegra: Fix ADX byte map
  arm64: tegra: Update AHUB clock parent and rate on Tegra234

 arch/arm64/boot/dts/nvidia/tegra186.dtsi |  3 ++-
 arch/arm64/boot/dts/nvidia/tegra194.dtsi |  3 ++-
 arch/arm64/boot/dts/nvidia/tegra210.dtsi |  3 ++-
 arch/arm64/boot/dts/nvidia/tegra234.dtsi |  3 ++-
 sound/soc/codecs/rt5640.c                | 20 ++++++++++++--------
 sound/soc/tegra/tegra186_asrc.c          |  4 ++--
 sound/soc/tegra/tegra210_adx.c           | 24 ++++++++++++------------
 sound/soc/tegra/tegra210_ahub.c          | 10 ----------
 sound/soc/tegra/tegra210_amx.c           | 30 ++++++++++++------------------
 sound/soc/tegra/tegra210_sfc.c           | 31 ++++++++++++++++++++++++++++++-
 sound/soc/tegra/tegra210_sfc.h           |  4 ++--
 11 files changed, 78 insertions(+), 57 deletions(-)

Comments

Sameer Pujar June 23, 2023, 4:51 a.m. UTC | #1 
On 22-06-2023 17:43, Mark Brown wrote:
> On Thu, Jun 22, 2023 at 05:04:15PM +0530, Sameer Pujar wrote:
>> From: Sheetal <sheetal@nvidia.com>
>>
>> I2S data sanity tests fail beyond a bit clock frequency of 6.144MHz.
>> This happens because the AHUB clock rate is too low and it shows
>> 9.83MHz on boot.
>>
>> The maximum rate of PLLA_OUT0 is 49.152MHz and is used to serve I/O
>> clocks. It is recommended that AHUB clock operates higher than this.
>> Thus fix this by using PLLP_OUT0 as parent clock for AHUB instead of
>> PLLA_OUT0 and fix the rate to 81.6MHz.
>>
>> Fixes: dc94a94daa39 ("arm64: tegra: Add audio devices on Tegra234")
>> Cc: stable@vger.kernel.org
>> Signed-off-by: Sheetal <sheetal@nvidia.com>
> Fixes should come before cleanups in a patch series to ensure that they
> can be applied and sent as fixes without dependencies on non-fixes.

I sorted the series based on the subsystem. Will make sure to put 
'fixes' patch always first. Thanks.