From patchwork Mon Apr 11 09:50:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rohit Agarwal X-Patchwork-Id: 559762 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BE009C433FE for ; Mon, 11 Apr 2022 09:51:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240925AbiDKJx7 (ORCPT ); Mon, 11 Apr 2022 05:53:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38746 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345006AbiDKJxM (ORCPT ); Mon, 11 Apr 2022 05:53:12 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7359B41987; Mon, 11 Apr 2022 02:50:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1649670650; x=1681206650; h=from:to:cc:subject:date:message-id; bh=FwIfYF2sW0uBB3HT6Ujtl39ujKcPOfiLJ8Kif3t6TUQ=; b=DibQT0sMxRRdRNiRMr6MTO7VxEiJ6jJ1YruitlRGncKFX6wkwzN5rFsm C4OnZpJme3tXaEJvyL8zrbNcuauLqpsJMiEYTiw518Dfl04zxZ0/GEg6I YcGewp6+vvQDyGwIzmi0gQfL+/ufTfntIpVcfHfjkc8LwlRzzEpgMoZg7 Y=; Received: from ironmsg09-lv.qualcomm.com ([10.47.202.153]) by alexa-out.qualcomm.com with ESMTP; 11 Apr 2022 02:50:49 -0700 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg09-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 11 Apr 2022 02:50:47 -0700 X-QCInternal: smtphost Received: from hu-rohiagar-hyd.qualcomm.com (HELO hu-sgudaval-hyd.qualcomm.com) ([10.213.106.138]) by ironmsg02-blr.qualcomm.com with ESMTP; 11 Apr 2022 15:20:24 +0530 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 3970568) id 76E3C3A9B; Mon, 11 Apr 2022 15:20:23 +0530 (+0530) From: Rohit Agarwal To: will@kernel.org, robin.murphy@arm.com, joro@8bytes.org, robh+dt@kernel.org, krzk+dt@kernel.org, ulf.hansson@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org Cc: manivannan.sadhasivam@linaro.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, linux-arm-msm@vger.kernel.org, Rohit Agarwal Subject: [PATCH v2 0/7] SDX65 devicetree updates Date: Mon, 11 Apr 2022 15:20:08 +0530 Message-Id: <1649670615-21268-1-git-send-email-quic_rohiagar@quicinc.com> X-Mailer: git-send-email 2.7.4 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hello, This series adds devicetree nodes for SDX65. It adds reserved memory nodes, SDHCI, smmu and tcsr mutex support. Changes from v1: - Addressed Mani's Comments and made necessary. - Rebased on top of v5.18-rc2. Thanks, Rohit. Rohit Agarwal (7): ARM: dts: qcom: sdx65: Add reserved memory nodes dt-bindings: mmc: sdhci-msm: Document the SDX65 compatible ARM: dts: qcom: sdx65: Add support for SDHCI controller dt-bindings: arm-smmu: Add binding for SDX65 SMMU ARM: dts: qcom: sdx65: Enable ARM SMMU ARM: dts: qcom: sdx65: Add support for TCSR Mutex ARM: dts: qcom: sdx65: Add Shared memory manager support .../devicetree/bindings/iommu/arm,smmu.yaml | 1 + .../devicetree/bindings/mmc/sdhci-msm.txt | 1 + arch/arm/boot/dts/qcom-sdx65-mtp.dts | 21 ++++ arch/arm/boot/dts/qcom-sdx65.dtsi | 110 +++++++++++++++++++++ 4 files changed, 133 insertions(+)