From patchwork Thu Mar 17 14:37:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivasa Rao Mandadapu X-Patchwork-Id: 552762 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B37F9C433FE for ; Thu, 17 Mar 2022 14:37:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235071AbiCQOik (ORCPT ); Thu, 17 Mar 2022 10:38:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47660 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233923AbiCQOik (ORCPT ); Thu, 17 Mar 2022 10:38:40 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D96CF1D66CD; Thu, 17 Mar 2022 07:37:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1647527844; x=1679063844; h=from:to:cc:subject:date:message-id:mime-version; bh=AfMbItGnx8pHlNrtZU9T20Nut3PvtZZITfFVgk/nQJQ=; b=YmW9Y2Gybxulbnc8iYkWoA8jj/kBcnyjI3AfNa3Zr9FHxkAkwbITr4NB tNGMl7jL/pkD18f2aE1e8mqTQmSSiTNiI6Oe5utB6GXXCdMT+kR/tJcw8 RxEXQB6L1L+3iBHFojB5pIKQU3LIP7tqenAtDoxSKg33KgjZeM3EgDXKZ I=; Received: from ironmsg08-lv.qualcomm.com ([10.47.202.152]) by alexa-out.qualcomm.com with ESMTP; 17 Mar 2022 07:37:23 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg08-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Mar 2022 07:37:23 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Thu, 17 Mar 2022 07:37:22 -0700 Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Thu, 17 Mar 2022 07:37:18 -0700 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , CC: Srinivasa Rao Mandadapu Subject: [PATCH v4 0/3] Add lpass pin control support for audio on sc7280 based targets Date: Thu, 17 Mar 2022 20:07:02 +0530 Message-ID: <1647527825-7493-1-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch set is to add lpass pin control support for Audio over I2S, wcd codec and digital mics. This patch set depends on: -- https://patchwork.kernel.org/project/alsa-devel/patch/1638891339-21806-3-git-send-email-quic_srivasam@quicinc.com/ Changes Since V3: -- Add pinctrl nodes for wcd codec reset and CTIA/OMTP headset selection. Changes Since V2: -- Move lpass pin control node to main dtsi file. -- Sort nodes alphabetically. -- Remove redundant wcd reset gpio nodes. -- Remove redundant input-enable field in dmic pin control nodes. -- Update amp_en node. -- Fix typo errors. -- Modify node names. -- Create patches on latest kernel. Changes Since V1: -- Merge pinmux and pinconf properties in amp_en and wcd pin reset node. -- Split common i2s pin control nodes to functionality specific nodes. -- Move board specific properties to board specific dtsi file. -- Update dmic pin control node name. Srinivasa Rao Mandadapu (3): arm64: dts: qcom: sc7280: Add pinctrl for wcd938x codec reset and CTIA/OMTP headset selection arm64: dts: qcom: sc7280: Add pinmux for I2S speaker and Headset arm64: dts: qcom: sc7280: add lpass lpi pin controller node arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 63 +++++++++++ arch/arm64/boot/dts/qcom/sc7280.dtsi | 188 +++++++++++++++++++++++++++++++ 2 files changed, 251 insertions(+)