From patchwork Fri Feb 5 01:28:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hsin-Hsiung Wang X-Patchwork-Id: 377217 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 20C1CC433E0 for ; Fri, 5 Feb 2021 01:29:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AF89464F4A for ; Fri, 5 Feb 2021 01:29:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232664AbhBEB3Z (ORCPT ); Thu, 4 Feb 2021 20:29:25 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:37302 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S232729AbhBEB3Y (ORCPT ); Thu, 4 Feb 2021 20:29:24 -0500 X-UUID: 2c312671aef94171a84c828fd4c0b4a8-20210205 X-UUID: 2c312671aef94171a84c828fd4c0b4a8-20210205 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 976503263; Fri, 05 Feb 2021 09:28:15 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 5 Feb 2021 09:28:13 +0800 Received: from mtksdaap41.mediatek.inc (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 5 Feb 2021 09:28:13 +0800 From: Hsin-Hsiung Wang To: Rob Herring , Matthias Brugger , , Argus Lin CC: Hsin-Hsiung Wang , , , , , , Subject: [PATCH v5 0/5] Add PMIC wrapper support for Mediatek MT6873/8192 SoC IC Date: Fri, 5 Feb 2021 09:28:06 +0800 Message-ID: <1612488491-6149-1-git-send-email-hsin-hsiung.wang@mediatek.com> X-Mailer: git-send-email 2.6.4 MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This series adds support for new SoC MT6873/8192 to the pmic-wrap driver. changes since v4: - refine code about PWRAP_CAP_ARB capacity for better code quality. - update correct pwrap node in the Mediatek MT8192 dtsi. Hsin-Hsiung Wang (5): soc: mediatek: pwrap: use BIT() macro soc: mediatek: pwrap: add arbiter capability dt-bindings: mediatek: add compatible for MT6873/8192 pwrap soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs arm64: dts: mt8192: add pwrap node .../bindings/soc/mediatek/pwrap.txt | 1 + arch/arm64/boot/dts/mediatek/mt8192.dtsi | 12 +++ drivers/soc/mediatek/mtk-pmic-wrap.c | 97 ++++++++++++++++--- 3 files changed, 95 insertions(+), 15 deletions(-)