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[v5,0/5] Add TI PRUSS Local Interrupt Controller IRQChip driver

Message ID 1597671613-20879-1-git-send-email-grzegorz.jaszczyk@linaro.org
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Series Add TI PRUSS Local Interrupt Controller IRQChip driver | expand

Message

Grzegorz Jaszczyk Aug. 17, 2020, 1:40 p.m. UTC
Hi All,

The following is a v4 version of the series [1-4] that adds an IRQChip
driver for the local interrupt controller present within a Programmable
Real-Time Unit and Industrial Communication Subsystem (PRU-ICSS) present on a
number of TI SoCs including OMAP architecture based AM335x, AM437x, AM57xx SoCs,
Keystone 2 architecture based 66AK2G SoCs, Davinci architecture based
OMAP-L138/DA850 SoCs and the latest K3 architecture based AM65x and J721E SoCs.
Please see the v1 cover-letter [1] for details about the features of this
interrupt controller.  More details can be found in any of the supported SoC
TRMs.  Eg: Chapter 30.1.6 of AM5728 TRM [5]

Please see the individual patches for exact changes in each patch, following are
the main changes from v4:
 - Update dt-binding description (no functional changes).
 - Use more meaningful define/variable names, drop redundant error messages, fix
   error handling in case of irq == 0 (patch #2).

[1] https://patchwork.kernel.org/cover/11034561/
[2] https://patchwork.kernel.org/cover/11069749/
[3] https://patchwork.kernel.org/cover/11639055/
[4] https://patchwork.kernel.org/cover/11688727/
[5] http://www.ti.com/lit/pdf/spruhz6

Best regards
Grzegorz

David Lechner (1):
  irqchip/irq-pruss-intc: Implement irq_{get,set}_irqchip_state ops

Grzegorz Jaszczyk (1):
  irqchip/irq-pruss-intc: Add a PRUSS irqchip driver for PRUSS
    interrupts

Suman Anna (3):
  dt-bindings: irqchip: Add PRU-ICSS interrupt controller bindings
  irqchip/irq-pruss-intc: Add logic for handling reserved interrupts
  irqchip/irq-pruss-intc: Add support for ICSSG INTC on K3 SoCs

 .../interrupt-controller/ti,pruss-intc.yaml        | 158 +++++
 drivers/irqchip/Kconfig                            |  10 +
 drivers/irqchip/Makefile                           |   1 +
 drivers/irqchip/irq-pruss-intc.c                   | 658 +++++++++++++++++++++
 4 files changed, 827 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/ti,pruss-intc.yaml
 create mode 100644 drivers/irqchip/irq-pruss-intc.c

-- 
2.7.4

Comments

Rob Herring (Arm) Aug. 25, 2020, 7:09 p.m. UTC | #1
On Mon, 17 Aug 2020 15:40:09 +0200, Grzegorz Jaszczyk wrote:
> From: Suman Anna <s-anna@ti.com>

> 

> The Programmable Real-Time Unit and Industrial Communication Subsystem

> (PRU-ICSS or simply PRUSS) contains an interrupt controller (INTC) that

> can handle various system input events and post interrupts back to the

> device-level initiators. The INTC can support up to 64 input events on

> most SoCs with individual control configuration and h/w prioritization.

> These events are mapped onto 10 output interrupt lines through two levels

> of many-to-one mapping support. Different interrupt lines are routed to

> the individual PRU cores or to the host CPU or to other PRUSS instances.

> 

> The K3 AM65x and J721E SoCs have the next generation of the PRU-ICSS IP,

> commonly called ICSSG. The ICSSG interrupt controller on K3 SoCs provide

> a higher number of host interrupts (20 vs 10) and can handle an increased

> number of input events (160 vs 64) from various SoC interrupt sources.

> 

> Add the bindings document for these interrupt controllers on all the

> applicable SoCs. It covers the OMAP architecture SoCs - AM33xx, AM437x

> and AM57xx; the Keystone 2 architecture based 66AK2G SoC; the Davinci

> architecture based OMAPL138 SoCs, and the K3 architecture based AM65x

> and J721E SoCs.

> 

> Signed-off-by: Suman Anna <s-anna@ti.com>

> Signed-off-by: Andrew F. Davis <afd@ti.com>

> Signed-off-by: Roger Quadros <rogerq@ti.com>

> Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>

> ---

> v4->v5:

> - Fix typo in commit description.

> - Update interrupt-cells description regarding each cells meaning.

> v3->v4:

> - Drop allOf references to interrupt-controller.yaml and

>   interrupts.yaml.

> - Drop items descriptions and use only maxItems: 1 as suggested by Rob.

> - Convert irqs-reserved property from uint8-array to bitmask.

> - Minor descriptions updates.

> - Change interrupt-cells to 3 in order to provide 2-level mapping

>   description for interrupts routed to the main CPU (as Marc requested).

> - Merge the irqs-reserved and irqs-shared to one property since they

>   can be handled by one logic.

> - Drop reviewed-by due to introduced changes.

> - Add another example illustrating irqs-reserved property usage.

> v2->v3:

> - Convert dt-binding to YAML

> v1->v2:

> - https://patchwork.kernel.org/patch/11069767/

> 

> update irq-pruss-intc binding

> ---

>  .../interrupt-controller/ti,pruss-intc.yaml        | 158 +++++++++++++++++++++

>  1 file changed, 158 insertions(+)

>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/ti,pruss-intc.yaml

> 


Reviewed-by: Rob Herring <robh@kernel.org>