From patchwork Wed Jun 10 17:18:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Taniya Das X-Patchwork-Id: 199233 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.5 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BE2F7C433E0 for ; Wed, 10 Jun 2020 17:18:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 99F322070B for ; Wed, 10 Jun 2020 17:18:42 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="Q0JHlkyT" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728528AbgFJRSm (ORCPT ); Wed, 10 Jun 2020 13:18:42 -0400 Received: from mail27.static.mailgun.info ([104.130.122.27]:17008 "EHLO mail27.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726157AbgFJRSj (ORCPT ); Wed, 10 Jun 2020 13:18:39 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1591809519; h=Message-Id: Date: Subject: Cc: To: From: Sender; bh=nxi/PGUd2Nz7sCq1j6UIB/PKdUyrLOXHbbMcUCzd5kU=; b=Q0JHlkyThQ++BMPyRHr5noUtTOETDdAyr7M9UKQIaSpiRrm72PWc3El7dACaoKwJwQuviqA4 NknABJtEtEhNWwld5+qSBVkz/bDoUHdftMOPPdU9rhVkQr22P7fB8j14prg3n9fzyQTEJ4vo +nwhKhO42WE2c7UlFZoKrNjLLsM= X-Mailgun-Sending-Ip: 104.130.122.27 X-Mailgun-Sid: WyI1YmJiNiIsICJkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n01.prod.us-west-2.postgun.com with SMTP id 5ee115de5866879c7650cb04 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Wed, 10 Jun 2020 17:18:22 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 26DDFC4339C; Wed, 10 Jun 2020 17:18:22 +0000 (UTC) Received: from tdas-linux.qualcomm.com (blr-c-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: tdas) by smtp.codeaurora.org (Postfix) with ESMTPSA id 8CC2CC433CA; Wed, 10 Jun 2020 17:18:17 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 8CC2CC433CA Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=tdas@codeaurora.org From: Taniya Das To: Stephen Boyd , =?utf-8?q?Michael_Turquette_=C2=A0?= Cc: David Brown , Rajendra Nayak , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Andy Gross , devicetree@vger.kernel.org, robh@kernel.org, robh+dt@kernel.org, Taniya Das Subject: [PATCH v3 0/4] clk: qcom: Support for Low Power Audio Clocks on SC7180 Date: Wed, 10 Jun 2020 22:48:03 +0530 Message-Id: <1591809487-5588-1-git-send-email-tdas@codeaurora.org> X-Mailer: git-send-email 2.7.4 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org [v3] * Update the clock-name to iface instead of gcc_lpass_sway. * Update the documentation with the reg descriptions and use maxItems. [v2] * Update retention macro name. * Update the register description in the documentation. [v1] * Add support for Retention of GDSCR. * Add YAML schema for LPASS clocks and clock IDs for LPASS. * Add clock driver for LPASS core clocks and GCC LPASS clock. Taniya Das (4): clk: qcom: gdsc: Add support to enable retention of GSDCR dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7180 clk: qcom: gcc: Add support for GCC LPASS clock for SC7180 clk: qcom: lpass: Add support for LPASS clock controller for SC7180 .../bindings/clock/qcom,sc7180-lpasscorecc.yaml | 98 +++++ drivers/clk/qcom/Kconfig | 9 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/gcc-sc7180.c | 14 + drivers/clk/qcom/gdsc.c | 12 + drivers/clk/qcom/gdsc.h | 1 + drivers/clk/qcom/lpasscorecc-sc7180.c | 478 +++++++++++++++++++++ include/dt-bindings/clock/qcom,gcc-sc7180.h | 1 + .../dt-bindings/clock/qcom,lpasscorecc-sc7180.h | 29 ++ 9 files changed, 643 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,sc7180-lpasscorecc.yaml create mode 100644 drivers/clk/qcom/lpasscorecc-sc7180.c create mode 100644 include/dt-bindings/clock/qcom,lpasscorecc-sc7180.h --- Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.