From patchwork Wed Jun 3 09:09:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pradeep P V K X-Patchwork-Id: 199620 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CBE6CC433DF for ; Wed, 3 Jun 2020 09:11:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B4D3D2068D for ; Wed, 3 Jun 2020 09:11:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726268AbgFCJLZ (ORCPT ); Wed, 3 Jun 2020 05:11:25 -0400 Received: from alexa-out-blr-02.qualcomm.com ([103.229.18.198]:13487 "EHLO alexa-out-blr-02.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725355AbgFCJLY (ORCPT ); Wed, 3 Jun 2020 05:11:24 -0400 Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by alexa-out-blr-02.qualcomm.com with ESMTP/TLS/AES256-SHA; 03 Jun 2020 14:40:20 +0530 Received: from c-ppvk-linux.qualcomm.com ([10.206.24.34]) by ironmsg02-blr.qualcomm.com with ESMTP; 03 Jun 2020 14:39:50 +0530 Received: by c-ppvk-linux.qualcomm.com (Postfix, from userid 2304101) id 0BBF85046; Wed, 3 Jun 2020 14:39:48 +0530 (IST) From: Pradeep P V K To: bjorn.andersson@linaro.org, adrian.hunter@intel.com, robh+dt@kernel.org, ulf.hansson@linaro.org, vbadigan@codeaurora.org, sboyd@kernel.org, georgi.djakov@linaro.org, mka@chromium.org Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-mmc-owner@vger.kernel.org, rnayak@codeaurora.org, sibis@codeaurora.org, matthias@chromium.org, Pradeep P V K Subject: [PATCH V1 0/2] Add SDHC interconnect bandwidth scaling Date: Wed, 3 Jun 2020 14:39:34 +0530 Message-Id: <1591175376-2374-1-git-send-email-ppvk@codeaurora.org> X-Mailer: git-send-email 1.9.1 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add interconnect bandwidths for SDHC driver using OPP framework that is required by SDHC driver based on the clock frequency and bus width of the card. Otherwise, the system clocks may run at minimum clock speed and thus affecting the performance. This change is based on [1] [Patch v8] Introduce OPP bandwidth bindings (https://lkml.org/lkml/2020/5/12/493) [2] [Patch v3 09/17] mmc: sdhci-msm: Fix error handling for dev_pm_opp_of_add_table() (https://lkml.org/lkml/2020/5/5/491) [3] [RFC v6 2/2] dt-bindings: mmc: sdhci-msm: Add interconnect BW scaling strings (https://lkml.org/lkml/2020/3/23/409) as there were no extra changes made on [3], retaining the Acked-by and Reviewed-by sign-off from [3]. Pradeep P V K (2): mmc: sdhci-msm: Add interconnect bandwidth scaling support dt-bindings: mmc: sdhci-msm: Add interconnect BW scaling strings Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 18 ++++++++++++++++++ drivers/mmc/host/sdhci-msm.c | 16 ++++++++++++++++ 2 files changed, 34 insertions(+)