From patchwork Sat Feb 15 18:55:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhou Yanjie X-Patchwork-Id: 204763 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3301BC76197 for ; Sat, 15 Feb 2020 18:56:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 124E224654 for ; Sat, 15 Feb 2020 18:56:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726680AbgBOS4M (ORCPT ); Sat, 15 Feb 2020 13:56:12 -0500 Received: from out28-51.mail.aliyun.com ([115.124.28.51]:57904 "EHLO out28-51.mail.aliyun.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726233AbgBOS4K (ORCPT ); Sat, 15 Feb 2020 13:56:10 -0500 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.08891963|-1; CH=green; DM=CONTINUE|CONTINUE|true|0.612978-0.0599614-0.327061; DS=CONTINUE|ham_system_inform|0.084116-0.000465042-0.915419; FP=0|0|0|0|0|-1|-1|-1; HT=e01l07440; MF=zhouyanjie@wanyeetech.com; NM=1; PH=DS; RN=24; RT=24; SR=0; TI=SMTPD_---.GoTIZgt_1581792955; Received: from localhost.localdomain(mailfrom:zhouyanjie@wanyeetech.com fp:SMTPD_---.GoTIZgt_1581792955) by smtp.aliyun-inc.com(10.147.42.241); Sun, 16 Feb 2020 02:56:04 +0800 From: =?utf-8?b?5ZGo55Cw5p2wIChaaG91IFlhbmppZSk=?= To: linux-mips@vger.kernel.org Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, paul@crapouillou.net, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, ralf@linux-mips.org, paulburton@kernel.org, jiaxun.yang@flygoat.com, chenhc@lemote.com, allison@lohutok.net, tglx@linutronix.de, daniel.lezcano@linaro.org, geert+renesas@glider.be, krzk@kernel.org, keescook@chromium.org, ebiederm@xmission.com, miquel.raynal@bootlin.com, paul@boddie.org.uk, hns@goldelico.com, mips-creator-ci20-dev@googlegroups.com Subject: [PATCH v5 0/7] Introduce SMP support for JZ4780. Date: Sun, 16 Feb 2020 02:55:25 +0800 Message-Id: <1581792932-108032-2-git-send-email-zhouyanjie@wanyeetech.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1581792932-108032-1-git-send-email-zhouyanjie@wanyeetech.com> References: <1581792932-108032-1-git-send-email-zhouyanjie@wanyeetech.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Introduce SMP support for MIPS Creator CI20, which is based on Ingenic JZ4780 SoC. 周琰杰 (Zhou Yanjie) (7): clk: JZ4780: Add function for enable the second core. MIPS: JZ4780: Introduce SMP support. MIPS: CI20: Modify DTS to support high resolution timer for SMP. clocksource: Ingenic: Add high resolution timer support for SMP. dt-bindings: MIPS: Document Ingenic SoCs binding. MIPS: Ingenic: Add 'cpus' node for Ingenic SoCs. MIPS: CI20: Update defconfig to support SMP. .../bindings/mips/ingenic/ingenic,cpu.yaml | 53 ++++ .../bindings/mips/ingenic/ingenic,soc.yaml | 35 +++ arch/mips/boot/dts/ingenic/ci20.dts | 13 +- arch/mips/boot/dts/ingenic/jz4740.dtsi | 14 + arch/mips/boot/dts/ingenic/jz4770.dtsi | 15 +- arch/mips/boot/dts/ingenic/jz4780.dtsi | 23 ++ arch/mips/boot/dts/ingenic/x1000.dtsi | 14 + arch/mips/configs/ci20_defconfig | 2 + arch/mips/include/asm/mach-jz4740/jz4780-smp.h | 91 +++++++ arch/mips/jz4740/Kconfig | 3 + arch/mips/jz4740/Makefile | 5 + arch/mips/jz4740/prom.c | 4 + arch/mips/jz4740/smp-entry.S | 57 +++++ arch/mips/jz4740/smp.c | 283 +++++++++++++++++++++ arch/mips/kernel/idle.c | 14 +- drivers/clk/ingenic/jz4780-cgu.c | 58 ++++- drivers/clocksource/ingenic-timer.c | 115 +++++++-- 17 files changed, 767 insertions(+), 32 deletions(-) create mode 100644 Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml create mode 100644 Documentation/devicetree/bindings/mips/ingenic/ingenic,soc.yaml create mode 100644 arch/mips/include/asm/mach-jz4740/jz4780-smp.h create mode 100644 arch/mips/jz4740/smp-entry.S create mode 100644 arch/mips/jz4740/smp.c