From patchwork Wed Jan 15 10:59:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 205704 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4D2D0C33CB1 for ; Wed, 15 Jan 2020 11:00:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2E0A82467C for ; Wed, 15 Jan 2020 11:00:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729968AbgAOLAB (ORCPT ); Wed, 15 Jan 2020 06:00:01 -0500 Received: from esa3.microchip.iphmx.com ([68.232.153.233]:41261 "EHLO esa3.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729548AbgAOLAB (ORCPT ); Wed, 15 Jan 2020 06:00:01 -0500 Received-SPF: Pass (esa3.microchip.iphmx.com: domain of Claudiu.Beznea@microchip.com designates 198.175.253.82 as permitted sender) identity=mailfrom; client-ip=198.175.253.82; receiver=esa3.microchip.iphmx.com; envelope-from="Claudiu.Beznea@microchip.com"; x-sender="Claudiu.Beznea@microchip.com"; x-conformance=spf_only; x-record-type="v=spf1"; x-record-text="v=spf1 mx a:ushub1.microchip.com a:smtpout.microchip.com -exists:%{i}.spf.microchip.iphmx.com include:servers.mcsv.net include:mktomail.com include:spf.protection.outlook.com ~all" Received-SPF: None (esa3.microchip.iphmx.com: no sender authenticity information available from domain of postmaster@email.microchip.com) identity=helo; client-ip=198.175.253.82; receiver=esa3.microchip.iphmx.com; envelope-from="Claudiu.Beznea@microchip.com"; x-sender="postmaster@email.microchip.com"; x-conformance=spf_only Authentication-Results: esa3.microchip.iphmx.com; dkim=none (message not signed) header.i=none; spf=Pass smtp.mailfrom=Claudiu.Beznea@microchip.com; spf=None smtp.helo=postmaster@email.microchip.com; dmarc=pass (p=none dis=none) d=microchip.com IronPort-SDR: 8KGwPGZq2hRHIOv1uIGByeTzBsNRTh82LLtl60f/DnDw6Y7tiqu2EOqUK4J4uvaAJi0GHx5X/o /v1gNnZ6WAuu52BMUN5lmLWWmMzYAfNkaNHQchr9Oqxg93m8EBLNQiSnwiNVSTCh36Rd8GD8jE 7ECFchoYCdDCiPoISXvZxeiuv+y7cFmmStMBHd23pZhjgST+e6u1oAEwZ1xzR1cO1e5hYiyYg5 A9yLVrnD7CGRE+XT8d6UtDme5KpuyZu9STeJpgotP+iXdFAHyFl0gXWlhc2F6WxmC8MrkIP+Ef JkQ= X-IronPort-AV: E=Sophos;i="5.70,322,1574146800"; d="scan'208";a="63325742" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 15 Jan 2020 04:00:00 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Wed, 15 Jan 2020 04:00:00 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.85.251) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.1713.5 via Frontend Transport; Wed, 15 Jan 2020 03:59:56 -0700 From: Claudiu Beznea To: , , , , , , , , CC: , , , , , Claudiu Beznea Subject: [PATCH v4 0/5] add device tree for SAM9X60 SoC and SAM9X60-EK board Date: Wed, 15 Jan 2020 12:59:42 +0200 Message-ID: <1579085987-13976-1-git-send-email-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This series add device tree for SAM9X60 SoC and SAM9X60-EK board. Allong with these, there are patches that documents some compatibles for SAM9X60's IPs. Changes in v4: - remove patches: - dt-bindings: atmel-tcb: remove wildcard - dt-bindings: atmel-tcb: add microchip,sam9x60-tcb since they were applied - address review comments - fix compatible list for dbug in sam9x60.dtsi Changes in v3: - remove applied patches from series - split patch "dt-bindings: atmel-tcb: add microchip,sam9x60-tcb" in two patches: - dt-bindings: atmel-tcb: add microchip,sam9x60-tcb - dt-bindings: atmel-tcb: remove wildcard - split patch "dt-bindings: atmel-usart: remove wildcard" in two patches: - dt-bindings: atmel-usart: add microchip,sam9x60-{usart, dbgu} - dt-bindings: atmel-usart: remove wildcard and adapt them as per review comments - collect acked-by tags Changes in v2: - replace patch "dt-bindings: at_xdmac: add entry for microchip compatibles" by patches: - dt-bindings: at_xdmac: add microchip,sam9x60-dma - dt-bindings: at_xdmac: remove wildcard. - replace patch "dt-bindings: atmel-usart: add microchip,-usart" by patches: - dt-bindings: atmel-usart: add microchip,sam9x60-{usart, dbgu} - dt-bindings: atmel-usart: remove wildcard - remove patch "dt-bindings: spi_atmel: add microchip,sam9x60-spi" as it was accepted - collect reviewed-by tags Claudiu Beznea (4): dt-bindings: atmel,at91rm9200-rtc: add microchip,sam9x60-rtc dt-bindings: atmel-usart: remove wildcard dt-bindings: atmel-usart: add microchip,sam9x60-{usart, dbgu} ARM: at91/defconfig: enable MMC_SDHCI_OF_AT91 and MICROCHIP_PIT64B Sandeep Sheriker Mallikarjun (1): ARM: dts: at91: sam9x60: add device tree for soc and board .../devicetree/bindings/mfd/atmel-usart.txt | 11 +- .../bindings/rtc/atmel,at91rm9200-rtc.txt | 3 +- arch/arm/boot/dts/Makefile | 2 + arch/arm/boot/dts/at91-sam9x60ek.dts | 647 +++++++++++++++++++ arch/arm/boot/dts/sam9x60.dtsi | 691 +++++++++++++++++++++ arch/arm/configs/at91_dt_defconfig | 4 + 6 files changed, 1353 insertions(+), 5 deletions(-) create mode 100644 arch/arm/boot/dts/at91-sam9x60ek.dts create mode 100644 arch/arm/boot/dts/sam9x60.dtsi