From patchwork Thu Jan 2 19:27:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eddie James X-Patchwork-Id: 206246 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82A4EC2D0C2 for ; Thu, 2 Jan 2020 19:28:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 65F4920848 for ; Thu, 2 Jan 2020 19:28:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728657AbgABT2u (ORCPT ); Thu, 2 Jan 2020 14:28:50 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:50130 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728260AbgABT2R (ORCPT ); Thu, 2 Jan 2020 14:28:17 -0500 Received: from pps.filterd (m0098410.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 002JGuE3095346; Thu, 2 Jan 2020 14:28:00 -0500 Received: from ppma02wdc.us.ibm.com (aa.5b.37a9.ip4.static.sl-reverse.com [169.55.91.170]) by mx0a-001b2d01.pphosted.com with ESMTP id 2x9j3p0qqg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 02 Jan 2020 14:28:00 -0500 Received: from pps.filterd (ppma02wdc.us.ibm.com [127.0.0.1]) by ppma02wdc.us.ibm.com (8.16.0.27/8.16.0.27) with SMTP id 002JFLSv000313; Thu, 2 Jan 2020 19:27:58 GMT Received: from b03cxnp08026.gho.boulder.ibm.com (b03cxnp08026.gho.boulder.ibm.com [9.17.130.18]) by ppma02wdc.us.ibm.com with ESMTP id 2x5xp6k0cy-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 02 Jan 2020 19:27:58 +0000 Received: from b03ledav005.gho.boulder.ibm.com (b03ledav005.gho.boulder.ibm.com [9.17.130.236]) by b03cxnp08026.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 002JRvoK47317312 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 2 Jan 2020 19:27:57 GMT Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 601D4BE056; Thu, 2 Jan 2020 19:27:57 +0000 (GMT) Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id BA063BE04F; Thu, 2 Jan 2020 19:27:56 +0000 (GMT) Received: from talon7.ibm.com (unknown [9.41.103.158]) by b03ledav005.gho.boulder.ibm.com (Postfix) with ESMTP; Thu, 2 Jan 2020 19:27:56 +0000 (GMT) From: Eddie James To: linux-aspeed@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, mark.rutland@arm.com, jason@lakedaemon.net, maz@kernel.org, robh+dt@kernel.org, tglx@linutronix.de, joel@jms.id.au, andrew@aj.id.au, eajames@linux.ibm.com Subject: [PATCH v4 00/12] aspeed: Add SCU interrupt controller and XDMA engine drivers Date: Thu, 2 Jan 2020 13:27:44 -0600 Message-Id: <1577993276-2184-1-git-send-email-eajames@linux.ibm.com> X-Mailer: git-send-email 1.8.3.1 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95, 18.0.572 definitions=2020-01-02_06:2020-01-02, 2020-01-02 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 adultscore=0 clxscore=1015 suspectscore=1 phishscore=0 lowpriorityscore=0 impostorscore=0 mlxlogscore=675 bulkscore=0 priorityscore=1501 spamscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-1910280000 definitions=main-2001020156 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This series first adds a driver to control the interrupt controller provided by the System Control Unit (SCU) on the AST2500 and AST2600 SOCs. The interrupts made available are necessary for the control of the XDMA engine embedded in the same Aspeed SOCs. This series then adds a driver to control the XDMA engine. This driver was previously sent to the list without support for the AST2600, and has been refactored significantly to enable that support. The XDMA engine performs automatic DMA operations between the Aspeed SOC (acting as a BMC) and a host processor. Changes since v3: - See individual patches; just clean-up items Changes since v2: - See individual patches - Drop rainier dts patch - In summary, remove references to VGA memory as the XDMA driver doesn't care where it is. Remove SDRAM controller reference. Move user reset functionality to a separate patch and make it an ioctl. Changes since v1: - See individual patches - In summary, first the irqchip driver switched to use the parent SCU regmap rather than iomapping it's register. Secondly, the XDMA initialization switched to use properties from the device tree rather than dynamically calculate memory spaces, and system config. Eddie James (12): dt-bindings: interrupt-controller: Add Aspeed SCU interrupt controller irqchip: Add Aspeed SCU interrupt controller ARM: dts: aspeed: ast2500: Add SCU interrupt controller ARM: dts: aspeed: ast2600: Add SCU interrupt controllers dt-bindings: soc: Add Aspeed XDMA Engine soc: aspeed: Add XDMA Engine Driver soc: aspeed: xdma: Add user interface soc: aspeed: xdma: Add reset ioctl ARM: dts: aspeed: ast2500: Add XDMA Engine ARM: dts: aspeed: ast2600: Add XDMA Engine ARM: dts: aspeed: witherspoon: Enable XDMA Engine ARM: dts: aspeed: tacoma: Enable XDMA engine .../aspeed,ast2xxx-scu-ic.txt | 23 + .../devicetree/bindings/soc/aspeed/xdma.txt | 40 + MAINTAINERS | 16 + arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts | 5 + .../boot/dts/aspeed-bmc-opp-witherspoon.dts | 5 + arch/arm/boot/dts/aspeed-g5.dtsi | 19 + arch/arm/boot/dts/aspeed-g6.dtsi | 27 + drivers/irqchip/Makefile | 2 +- drivers/irqchip/irq-aspeed-scu-ic.c | 239 ++++ drivers/soc/aspeed/Kconfig | 8 + drivers/soc/aspeed/Makefile | 1 + drivers/soc/aspeed/aspeed-xdma.c | 1031 +++++++++++++++++ .../interrupt-controller/aspeed-scu-ic.h | 23 + include/uapi/linux/aspeed-xdma.h | 42 + 14 files changed, 1480 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2xxx-scu-ic.txt create mode 100644 Documentation/devicetree/bindings/soc/aspeed/xdma.txt create mode 100644 drivers/irqchip/irq-aspeed-scu-ic.c create mode 100644 drivers/soc/aspeed/aspeed-xdma.c create mode 100644 include/dt-bindings/interrupt-controller/aspeed-scu-ic.h create mode 100644 include/uapi/linux/aspeed-xdma.h