From patchwork Wed Feb 28 13:10:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre TORGUE X-Patchwork-Id: 129985 Delivered-To: patch@linaro.org Received: by 10.46.66.2 with SMTP id p2csp1008005lja; Wed, 28 Feb 2018 05:11:49 -0800 (PST) X-Google-Smtp-Source: AH8x224biWXU3Phu4m+rypkwMZIBOqbDGZh807SEXODS2mEyF061HSLHrhVg5ksVk5JygKjaN2QF X-Received: by 2002:a17:902:7c87:: with SMTP id y7-v6mr18188759pll.112.1519823509599; Wed, 28 Feb 2018 05:11:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519823509; cv=none; d=google.com; s=arc-20160816; b=PytHOhDfo1nxjnph7/lv45zaRF6sRdGXZe2L8y1+Vt2j/vZO44l3ZXqdK5Ep2MZONY B/gMvEJ7YNbTEEiae6HE4I8Qg243TikU1/HhtFtP1nVELrwgjSWMwTaUUsNHIz6H2mSz UNTj7gA84xTdFF30jxvsy2dqedYotHs9l1WYFuA9D0YpWZrisTvedYwd66HRfE90rutX Lg9A/VRZGctMLHvg12zMwVu2Ij6ro+KmhG6383CCodeocf0RkrmPuFFljgrQBhTFPUTr +4D54t3pSnO2zn+1C0wKndt0F6hesR7k5HQa6Qs9WsziGPFZWR4VWgFM3cTC7r+K5uee ImcQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from:arc-authentication-results; bh=FtwEWs9dty7Wd0skBibmAh4tmtMxlo4vIWBfutocpRM=; b=l8vrZy4nvCLOuvewaWeVxbhUzemEYAedtmqXdrO30ch1sdZ7+gEYcXvAYO1NCsbtgr wa8zxw9G1928DvkODP+ItGjH5DyFdpHYtAdEM4tdyIfAE2c27UAYSGiscFQW4PekUCZP AtTNWgseGQnHjlHm55L0eWLP1UfiMZBty6jNOwk+GX1eOacUy0w3fugzv79jApp1rwjC R2glDOxWHq/Zf8F4jWFBw0NQ1QN7WSNr9XO8CIWLCM8wOY5dZrJwwwKrDmmoDaWEnPed p+4tiQ5vNU/NJM614vsb1ns43laHOCZYKMQKjiGLLsk9F3aatNhs7fbFUah0eOz2gAz2 BoBA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w61-v6si1264584plb.733.2018.02.28.05.11.49; Wed, 28 Feb 2018 05:11:49 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752513AbeB1NLs (ORCPT + 6 others); Wed, 28 Feb 2018 08:11:48 -0500 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:54267 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752469AbeB1NLs (ORCPT ); Wed, 28 Feb 2018 08:11:48 -0500 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w1SD97fm022341; Wed, 28 Feb 2018 14:11:05 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2gbwb16w26-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Wed, 28 Feb 2018 14:11:05 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id C742F31; Wed, 28 Feb 2018 13:11:04 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag3node2.st.com [10.75.127.8]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 7C05B2B31; Wed, 28 Feb 2018 13:11:04 +0000 (GMT) Received: from localhost (10.75.127.47) by SFHDAG3NODE2.st.com (10.75.127.8) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 28 Feb 2018 14:11:04 +0100 From: Alexandre Torgue To: Maxime Coquelin , , , , , , CC: , , , Alexandre Torgue Subject: [PATCH v2 0/4] Enable DMA on STM32 MCU based on cortex-M7 Date: Wed, 28 Feb 2018 14:10:54 +0100 Message-ID: <1519823458-27734-1-git-send-email-alexandre.torgue@st.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Originating-IP: [10.75.127.47] X-ClientProxiedBy: SFHDAG2NODE2.st.com (10.75.127.5) To SFHDAG3NODE2.st.com (10.75.127.8) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-28_07:, , signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This series enable DMA on several STM32 MCU based on cortex-M7. To make it possible, a dedicated dma pool memory area has to be created. This patchset activate also ARM_MPU flag which will configure MPU (Memory Protection Unit) according to devicetree information (mem and dma-pool). Note that on cortex-M7 DMA has to use a NO cache-able memory region. v2: -select ARM_MPU in mach-stm32 Kconfig instead of add it in stm32 defconfig -Remove XIP configuration from stm32_defconfig: ARM_MPU flag imposes XIP image to be aligned on 1MB. It is currently not the case. I had choice to either modify current XIP start address to be aligned on 1MB or to remove global configuration. I make choice to remove XIP configuration. Indeed, SD card support has been recently added for most of STM32 MCU boards (except for stm32f429-disco). As kernel is growing up for stm32 it will be more and more difficult to flash it in embeded flash (max size: 2MB). -fix typo in commit message Regards Alex Alexandre Torgue (4): ARM: dts: stm32: add DMA memory pool on MCU which embed a cortex-M7 ARM: configs: stm32: remove XIP configuration ARM: stm32: Select ARM_MPU for cortex-M7 machines ARM: dts: stm32: enable dma on MCU which embed a cortex-M7 arch/arm/boot/dts/stm32746g-eval.dts | 21 +++++++++++++++++++++ arch/arm/boot/dts/stm32f769-disco.dts | 21 +++++++++++++++++++++ arch/arm/boot/dts/stm32h743i-disco.dts | 21 +++++++++++++++++++++ arch/arm/boot/dts/stm32h743i-eval.dts | 21 +++++++++++++++++++++ arch/arm/configs/stm32_defconfig | 2 -- arch/arm/mach-stm32/Kconfig | 3 +++ 6 files changed, 87 insertions(+), 2 deletions(-) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html