From patchwork Thu Jan 19 13:35:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ding Tianhong X-Patchwork-Id: 91888 Delivered-To: patch@linaro.org Received: by 10.182.3.34 with SMTP id 2csp273666obz; Thu, 19 Jan 2017 05:37:47 -0800 (PST) X-Received: by 10.98.15.143 with SMTP id 15mr10253443pfp.100.1484833067605; Thu, 19 Jan 2017 05:37:47 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i23si3591530pll.72.2017.01.19.05.37.47; Thu, 19 Jan 2017 05:37:47 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752931AbdASNhp (ORCPT + 7 others); Thu, 19 Jan 2017 08:37:45 -0500 Received: from szxga02-in.huawei.com ([119.145.14.65]:15387 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753106AbdASNho (ORCPT ); Thu, 19 Jan 2017 08:37:44 -0500 Received: from 172.24.1.36 (EHLO SZXEML429-HUB.china.huawei.com) ([172.24.1.36]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id DTP15613; Thu, 19 Jan 2017 21:35:27 +0800 (CST) Received: from localhost (10.177.23.32) by SZXEML429-HUB.china.huawei.com (10.82.67.184) with Microsoft SMTP Server id 14.3.235.1; Thu, 19 Jan 2017 21:35:19 +0800 From: Ding Tianhong To: , , , , , , , , , CC: Ding Tianhong Subject: [PATCH v9 0/4] arm64: arch_timer: Add workaround for hisilicon-161010101 erratum Date: Thu, 19 Jan 2017 21:35:12 +0800 Message-ID: <1484832916-7248-1-git-send-email-dingtianhong@huawei.com> X-Mailer: git-send-email 1.8.5.2.msysgit.0 MIME-Version: 1.0 X-Originating-IP: [10.177.23.32] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020205.5880C0A3.0103, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-06-18 04:22:30, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: a3cc467e192704109a3c2e6c1ce63284 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Erratum Hisilicon-161010101 says that the ARM generic timer counter "has the potential to contain an erroneous value when the timer value changes". Accesses to TVAL (both read and write) are also affected due to the implicit counter read. Accesses to CVAL are not affected. The workaround is to reread the system count registers until the value of the second read is larger than the first one by less than 32, the system counter can be guaranteed not to return wrong value twice by back-to-back read and the error value is always larger than the correct one by 32. Writes to TVAL are replaced with an equivalent write to CVAL. v2: Introducing a new generic erratum handling mechanism for fsl,a008585 and hisilicon,161601. Significant rework based on feedback, including seperate the fsl erratum a008585 to another patch, update the erratum name and remove unwanted code. v3: Introducing the erratum_workaround_set_sne generic function for fsl erratum a008585 and make the #define __fsl_a008585_read_reg to be private to the .c file instead of being globally visible. After discussion with Marc and Will, a consensus decision was made to remove the commandline parameter for enabling fsl,erratum-a008585 erratum, and make some generic name more specific, export timer_unstable_counter_workaround for module access. Significant rework based on feedback, including fix some alignment problem, make the #define __hisi_161601_read_reg to be private to the .c file instead of being globally visible, add more accurate annotation and modify a bit of logical format to enable arch_timer_read_ool_enabled, remove the kernel commandline parameter clocksource.arm_arch_timer.hisilicon-161601. Introduce a generic aquick framework for erratum in ACPI mode. v4: rename the quirk handler parameter to make it more generic, and avoid break loop when handling the quirk becasue it need to support multi quirks handler. update some data structures for acpi mode. v5: Adapt the new kernel-parameters.txt for latest kernel version. Set the retries of reread system counter to 50, because it is possible that some interrupts may lead to more than twice read errors and break the loop, it will trigger the warning, so we set the number of retries far beyond the number of iterations the loop has been observed to take. v6: The last 2 patches in the previous version about the ACPI mode will conflict witch Fuwei's GTDT patches, so remove the ACPI part and only support the DT base code for this patch set. We have trigger a bug when select the CONFIG_FUNCTION_GRAPH_TRACER and enable function_graph to /sys/kernel/debug/tracing/current_tracer, the system will stall into an endless loop, it looks like that the ftrace_graph_caller will be related to xxx.read_cntvct_el0 and read the system counter again, so mark the xxx.read_cntvct_el0 with notrace to fix the problem. v7: Introduce a new general config symbol named CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND to enable the workaround for any chips which has similar arch timer erratum just like "fsl,erratum_a008585" and "hisilicon,erratum_161601", modify the struct arch_timer_erratum_workaround to be compatible different chip erratum more easily, and reconstruction some code base on the new config symbol and struct, thanks to Marc's suggestion. v8: The original erratum ID could not cover all modules, which only specified , so after discussion with the soc team, we decide to use the new ID "161010101" for this timer erratum which consist of and also update the hisilicon erratum official documents. v9: Modify the workaround description and remove the message for CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND. Ding Tianhong (4): arm64: arch_timer: Add device tree binding for hisilicon-161010101 erratum arm64: arch_timer: Introduce a generic erratum handing mechanism for fsl-a008585 arm64: arch_timer: Work around Erratum Hisilicon-161010101 arm64: arch timer: Add timer erratum property for Hip05-d02 and Hip06-d03 Documentation/admin-guide/kernel-parameters.txt | 9 -- Documentation/arm64/silicon-errata.txt | 43 +++--- .../devicetree/bindings/arm/arch_timer.txt | 6 + arch/arm64/boot/dts/hisilicon/hip05.dtsi | 1 + arch/arm64/boot/dts/hisilicon/hip06.dtsi | 1 + arch/arm64/include/asm/arch_timer.h | 38 ++---- drivers/clocksource/Kconfig | 18 +++ drivers/clocksource/arm_arch_timer.c | 150 +++++++++++++++------ 8 files changed, 171 insertions(+), 95 deletions(-) -- 1.9.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html