From patchwork Tue Dec 5 21:25:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Zanussi X-Patchwork-Id: 750773 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="ZKt5gikm" Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F2F5AD6F; Tue, 5 Dec 2023 13:25:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701811555; x=1733347555; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=KIwEAq00pSueG4DSxFjX/X+olr9EGFvm2qeS8vaAfoM=; b=ZKt5gikmMNLCUyuyIBirNK/wNmhn0BkremuD73L4mfrvhdhq6Ss4nQaJ ospX5RxHdMbeGZMYU5N0AcyqPE8qDkp4jZfke1R+Zc8R/OjTKsraXF3sn +84AF19o9smdgEKpE7MNG1x3UIs7X4mpm6ontWck7QxYQm7gSaXoCdn4w R75JAlWI6bk5H32W7qNYQEgHFFAczszwjq4d2GjgcT+7QcMswQTFCgkNN zMSwM0neeHSioF2I6KYSBQcBosqkI7UDOqhLFtT1QSed0TdLOLR3yKQQh lVvS+n3tI7tQkWrHl7beiEUCHgHg3OEqgTZJ2Vh+GB5hKghnojmk7k4Mf g==; X-IronPort-AV: E=McAfee;i="6600,9927,10915"; a="396751622" X-IronPort-AV: E=Sophos;i="6.04,253,1695711600"; d="scan'208";a="396751622" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Dec 2023 13:25:53 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.04,253,1695711600"; d="scan'208";a="19102614" Received: from jsamonte-mobl.amr.corp.intel.com (HELO tzanussi-mobl1.amr.corp.intel.com) ([10.212.71.180]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Dec 2023 13:25:52 -0800 From: Tom Zanussi To: herbert@gondor.apana.org.au, davem@davemloft.net, fenghua.yu@intel.com, vkoul@kernel.org Cc: dave.jiang@intel.com, tony.luck@intel.com, wajdi.k.feghali@intel.com, james.guilford@intel.com, kanchana.p.sridhar@intel.com, vinodh.gopal@intel.com, giovanni.cabiddu@intel.com, pavel@ucw.cz, linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, dmaengine@vger.kernel.org Subject: [PATCH v12 05/14] dmaengine: idxd: Add wq private data accessors Date: Tue, 5 Dec 2023 15:25:21 -0600 Message-Id: <20231205212530.285671-6-tom.zanussi@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231205212530.285671-1-tom.zanussi@linux.intel.com> References: <20231205212530.285671-1-tom.zanussi@linux.intel.com> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add the accessors idxd_wq_set_private() and idxd_wq_get_private() allowing users to set and retrieve a private void * associated with an idxd_wq. The private data is stored in the idxd_dev.conf_dev associated with each idxd_wq. Signed-off-by: Tom Zanussi Reviewed-by: Fenghua Yu Acked-by: Vinod Koul --- drivers/dma/idxd/idxd.h | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/dma/idxd/idxd.h b/drivers/dma/idxd/idxd.h index ae3be5cb2ee3..4b67181f4396 100644 --- a/drivers/dma/idxd/idxd.h +++ b/drivers/dma/idxd/idxd.h @@ -618,6 +618,16 @@ static inline int idxd_wq_refcount(struct idxd_wq *wq) return wq->client_count; }; +static inline void idxd_wq_set_private(struct idxd_wq *wq, void *private) +{ + dev_set_drvdata(wq_confdev(wq), private); +} + +static inline void *idxd_wq_get_private(struct idxd_wq *wq) +{ + return dev_get_drvdata(wq_confdev(wq)); +} + /* * Intel IAA does not support batch processing. * The max batch size of device, max batch size of wq and