From patchwork Fri Dec 1 20:10:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Zanussi X-Patchwork-Id: 749232 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="L2Zq7e7O" Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A35D010C2; Fri, 1 Dec 2023 12:11:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701461468; x=1732997468; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=KIwEAq00pSueG4DSxFjX/X+olr9EGFvm2qeS8vaAfoM=; b=L2Zq7e7OExxDorByqJT3bBFVvO7YQu2+XI1sZVeqKHWlVAMbm0L6/qFL 1QeFOm4INtdAJZRsOj0Vw3hrz9Oe9MSgCfxdFDKDeUIPHu8ysX3YhRHo5 2x8J4zUOOKZf3WZnwupZrsZ8w1s5cvcx4YD4/UKFmwdf0vQnLov/PVuJ7 ChA2zGRzvsx4MbR5CE9iLWQF2p5Y5h7ytoEyeZss+PMaIPiZDuvR8vIUG yqEJTcKFeXm2ewroPf5u1nComXF82mE9sme1gKC2rqaOMnZc+9xF4lCyi lSg2pvB9znSPVwiJLk3wbCGNrL2gIkg0WYUQzkYt4bVzApQz3elThcNFo w==; X-IronPort-AV: E=McAfee;i="6600,9927,10911"; a="427814" X-IronPort-AV: E=Sophos;i="6.04,242,1695711600"; d="scan'208";a="427814" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Dec 2023 12:10:51 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10911"; a="860671172" X-IronPort-AV: E=Sophos;i="6.04,242,1695711600"; d="scan'208";a="860671172" Received: from temersox-mobl2.amr.corp.intel.com (HELO tzanussi-mobl1.amr.corp.intel.com) ([10.213.166.197]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Dec 2023 12:10:49 -0800 From: Tom Zanussi To: herbert@gondor.apana.org.au, davem@davemloft.net, fenghua.yu@intel.com, vkoul@kernel.org Cc: dave.jiang@intel.com, tony.luck@intel.com, wajdi.k.feghali@intel.com, james.guilford@intel.com, kanchana.p.sridhar@intel.com, vinodh.gopal@intel.com, giovanni.cabiddu@intel.com, pavel@ucw.cz, linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, dmaengine@vger.kernel.org Subject: [PATCH v11 05/14] dmaengine: idxd: Add wq private data accessors Date: Fri, 1 Dec 2023 14:10:26 -0600 Message-Id: <20231201201035.172465-6-tom.zanussi@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231201201035.172465-1-tom.zanussi@linux.intel.com> References: <20231201201035.172465-1-tom.zanussi@linux.intel.com> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add the accessors idxd_wq_set_private() and idxd_wq_get_private() allowing users to set and retrieve a private void * associated with an idxd_wq. The private data is stored in the idxd_dev.conf_dev associated with each idxd_wq. Signed-off-by: Tom Zanussi Reviewed-by: Fenghua Yu Acked-by: Vinod Koul --- drivers/dma/idxd/idxd.h | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/dma/idxd/idxd.h b/drivers/dma/idxd/idxd.h index ae3be5cb2ee3..4b67181f4396 100644 --- a/drivers/dma/idxd/idxd.h +++ b/drivers/dma/idxd/idxd.h @@ -618,6 +618,16 @@ static inline int idxd_wq_refcount(struct idxd_wq *wq) return wq->client_count; }; +static inline void idxd_wq_set_private(struct idxd_wq *wq, void *private) +{ + dev_set_drvdata(wq_confdev(wq), private); +} + +static inline void *idxd_wq_get_private(struct idxd_wq *wq) +{ + return dev_get_drvdata(wq_confdev(wq)); +} + /* * Intel IAA does not support batch processing. * The max batch size of device, max batch size of wq and