| Message ID | 20230824-topic-sm8550-rng-v2-2-dfcafbb16a3e@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | arm64: qcom: sm8550: enable RNG | expand |
On 24.08.2023 13:33, Neil Armstrong wrote: > This reverts commit 76a6dd7bfcbb ("arm64: dts: qcom: sm8450: Add PRNG"), > since the RNG HW on the SM8450 SoC is in fact a True Random Number Generator, > a more appropriate compatible should be instead as reported at [1]. > > [1] https://lore.kernel.org/all/20230818161720.3644424-1-quic_omprsing@quicinc.com/ > > Suggested-by: Om Prakash Singh <quic_omprsing@quicinc.com> > Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> > Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 2a60cf8bd891..6ae64059cea5 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -1738,11 +1738,6 @@ spi14: spi@a98000 { }; }; - rng: rng@10c3000 { - compatible = "qcom,sm8450-prng-ee", "qcom,prng-ee"; - reg = <0 0x010c3000 0 0x1000>; - }; - pcie0: pci@1c00000 { compatible = "qcom,pcie-sm8450-pcie0"; reg = <0 0x01c00000 0 0x3000>,
This reverts commit 76a6dd7bfcbb ("arm64: dts: qcom: sm8450: Add PRNG"), since the RNG HW on the SM8450 SoC is in fact a True Random Number Generator, a more appropriate compatible should be instead as reported at [1]. [1] https://lore.kernel.org/all/20230818161720.3644424-1-quic_omprsing@quicinc.com/ Suggested-by: Om Prakash Singh <quic_omprsing@quicinc.com> Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 5 ----- 1 file changed, 5 deletions(-)