From patchwork Fri Apr 28 20:55:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Zanussi X-Patchwork-Id: 677902 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C7147C77B60 for ; Fri, 28 Apr 2023 20:56:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346784AbjD1U4F (ORCPT ); Fri, 28 Apr 2023 16:56:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38208 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346768AbjD1Uz5 (ORCPT ); Fri, 28 Apr 2023 16:55:57 -0400 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EE86B171D; Fri, 28 Apr 2023 13:55:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1682715355; x=1714251355; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=G8dwkg0nLTp2fzdKiGj52MZnO3oCLc/EIDbTs+VGJJo=; b=daAPgErbjmxn22/40kJXNzm5vvfbX8GJ4+yFkSNQbYVRWj4FIuSGr75c qIJxIBfZvVXOQ9D1NvRQf7BZyvp9mXJEZ3mVdUbJkTy9v7OAOnYlfyHCO VNoMxrWs7dzCN2XZTMLQon69RbgCCm92OThhmi0Ua9jZO5zSxgkhu5CrE dp5FVYu4kxutrcQJ1RD61h+AVfwq05WXD2igY/eFgOMhSHWpMs5MJsT92 LW5h3dhlzcZjaxmbs7iE/YAYPOuadu9OT6jPMZAO9FUvkrpB3ckCIaubr WnVB9KZSKhqGK458mPMjXs09TqmpkBq4+L1p+PVbIj1MoU5m4aUslyIvF g==; X-IronPort-AV: E=McAfee;i="6600,9927,10694"; a="336937659" X-IronPort-AV: E=Sophos;i="5.99,235,1677571200"; d="scan'208";a="336937659" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Apr 2023 13:55:55 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10694"; a="838980384" X-IronPort-AV: E=Sophos;i="5.99,235,1677571200"; d="scan'208";a="838980384" Received: from ykaur1-mobl2.amr.corp.intel.com (HELO tzanussi-mobl1.intel.com) ([10.209.181.29]) by fmsmga001-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Apr 2023 13:55:54 -0700 From: Tom Zanussi To: herbert@gondor.apana.org.au, davem@davemloft.net, fenghua.yu@intel.com, vkoul@kernel.org Cc: dave.jiang@intel.com, tony.luck@intel.com, wajdi.k.feghali@intel.com, james.guilford@intel.com, kanchana.p.sridhar@intel.com, giovanni.cabiddu@intel.com, hdanton@sina.com, linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, dmaengine@vger.kernel.org Subject: [PATCH v3 05/15] dmaengine: idxd: Export wq resource management functions Date: Fri, 28 Apr 2023 15:55:29 -0500 Message-Id: <20230428205539.113902-6-tom.zanussi@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230428205539.113902-1-tom.zanussi@linux.intel.com> References: <20230428205539.113902-1-tom.zanussi@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org To allow idxd sub-drivers to access the wq resource management functions, export them. Signed-off-by: Tom Zanussi Reviewed-by: Dave Jiang Reviewed-by: Fenghua Yu --- drivers/dma/idxd/device.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/dma/idxd/device.c b/drivers/dma/idxd/device.c index af1aa88a66c1..7837d0a56314 100644 --- a/drivers/dma/idxd/device.c +++ b/drivers/dma/idxd/device.c @@ -161,6 +161,7 @@ int idxd_wq_alloc_resources(struct idxd_wq *wq) free_hw_descs(wq); return rc; } +EXPORT_SYMBOL_NS_GPL(idxd_wq_alloc_resources, IDXD); void idxd_wq_free_resources(struct idxd_wq *wq) { @@ -174,6 +175,7 @@ void idxd_wq_free_resources(struct idxd_wq *wq) dma_free_coherent(dev, wq->compls_size, wq->compls, wq->compls_addr); sbitmap_queue_free(&wq->sbq); } +EXPORT_SYMBOL_NS_GPL(idxd_wq_free_resources, IDXD); int idxd_wq_enable(struct idxd_wq *wq) { @@ -422,6 +424,7 @@ int idxd_wq_init_percpu_ref(struct idxd_wq *wq) reinit_completion(&wq->wq_resurrect); return 0; } +EXPORT_SYMBOL_NS_GPL(idxd_wq_init_percpu_ref, IDXD); void __idxd_wq_quiesce(struct idxd_wq *wq) { @@ -431,6 +434,7 @@ void __idxd_wq_quiesce(struct idxd_wq *wq) complete_all(&wq->wq_resurrect); wait_for_completion(&wq->wq_dead); } +EXPORT_SYMBOL_NS_GPL(__idxd_wq_quiesce, IDXD); void idxd_wq_quiesce(struct idxd_wq *wq) { @@ -438,6 +442,7 @@ void idxd_wq_quiesce(struct idxd_wq *wq) __idxd_wq_quiesce(wq); mutex_unlock(&wq->wq_lock); } +EXPORT_SYMBOL_NS_GPL(idxd_wq_quiesce, IDXD); /* Device control bits */ static inline bool idxd_is_enabled(struct idxd_device *idxd)