From patchwork Tue Jan 10 13:50:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vincent Whitchurch X-Patchwork-Id: 641025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6B07FC46467 for ; Tue, 10 Jan 2023 13:51:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231974AbjAJNu5 (ORCPT ); Tue, 10 Jan 2023 08:50:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43886 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238252AbjAJNu4 (ORCPT ); Tue, 10 Jan 2023 08:50:56 -0500 Received: from smtp2.axis.com (smtp2.axis.com [195.60.68.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B228A640E; Tue, 10 Jan 2023 05:50:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=axis.com; q=dns/txt; s=axis-central1; t=1673358654; x=1704894654; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Ba6MyrEzcdHDm3pPgaIKXEToqVrbCHSG8Ev/nxX8HMo=; b=ec1CG//8jBN74mOQIbxYfMKiUOYn6scM3jBoiLLnyNBnvPu/h3PSjrB2 sWjzzQKMW3Cnurywa8p2c8HBk+jbA6cRhGRhF+yAFzwjJfuw48zF68Xnb /ObCWTzOwBx4UaMCZSYUAcmUQyOhIfmnzWFKOxSOHWDZyKLgmFDIuI3M5 0WlUnXSJazIk919R/Lt4nKRBYLSXpz3HsiyKtmGyJ23A5V6Nz7dJiczAj C2smhZD0Dof+FdjLNuwaJ6xeWOkOzp/Kro7sKQtsFOpIlD1zhIqBncbUK kbFgsMC4Uu+SlMSIFBGrlqemvmWmXKlOLb+AQJd5FdQGm6w4DbEPXV0Al A==; From: Vincent Whitchurch To: , , , CC: , Vincent Whitchurch , , Subject: [PATCH 03/12] crypto: axis - fix CTR output IV Date: Tue, 10 Jan 2023 14:50:33 +0100 Message-ID: <20230110135042.2940847-4-vincent.whitchurch@axis.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230110135042.2940847-1-vincent.whitchurch@axis.com> References: <20230110135042.2940847-1-vincent.whitchurch@axis.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org Write the updated counter value to the IV with software since the hardware does not do it. Fixes this self test: alg: skcipher: artpec6-ctr-aes encryption test failed (wrong output IV) on test vector 0, cfg="in-place (one sglist)" Signed-off-by: Vincent Whitchurch --- drivers/crypto/axis/artpec6_crypto.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/crypto/axis/artpec6_crypto.c b/drivers/crypto/axis/artpec6_crypto.c index d3b6ee065a81..67f510c497f2 100644 --- a/drivers/crypto/axis/artpec6_crypto.c +++ b/drivers/crypto/axis/artpec6_crypto.c @@ -370,6 +370,8 @@ artpec6_crypto_complete_cbc_encrypt(struct crypto_async_request *req); static void artpec6_crypto_complete_cbc_decrypt(struct crypto_async_request *req); static void +artpec6_crypto_complete_ctr(struct crypto_async_request *req); +static void artpec6_crypto_complete_aead(struct crypto_async_request *req); static void artpec6_crypto_complete_hash(struct crypto_async_request *req); @@ -1109,6 +1111,9 @@ static int artpec6_crypto_encrypt(struct skcipher_request *req) case ARTPEC6_CRYPTO_CIPHER_AES_CBC: complete = artpec6_crypto_complete_cbc_encrypt; break; + case ARTPEC6_CRYPTO_CIPHER_AES_CTR: + complete = artpec6_crypto_complete_ctr; + break; default: complete = artpec6_crypto_complete_crypto; break; @@ -1155,6 +1160,9 @@ static int artpec6_crypto_decrypt(struct skcipher_request *req) case ARTPEC6_CRYPTO_CIPHER_AES_CBC: complete = artpec6_crypto_complete_cbc_decrypt; break; + case ARTPEC6_CRYPTO_CIPHER_AES_CTR: + complete = artpec6_crypto_complete_ctr; + break; default: complete = artpec6_crypto_complete_crypto; break; @@ -2158,6 +2166,20 @@ static void artpec6_crypto_complete_crypto(struct crypto_async_request *req) req->complete(req, 0); } +static void artpec6_crypto_complete_ctr(struct crypto_async_request *req) +{ + struct skcipher_request *cipher_req = container_of(req, + struct skcipher_request, base); + unsigned int nblks = ALIGN(cipher_req->cryptlen, AES_BLOCK_SIZE) / + AES_BLOCK_SIZE; + __be32 *iv = (void *)cipher_req->iv; + unsigned int counter = be32_to_cpu(iv[3]); + + iv[3] = cpu_to_be32(counter + nblks); + + req->complete(req, 0); +} + static void artpec6_crypto_complete_cbc_decrypt(struct crypto_async_request *req) {