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[92.34.204.253]) by smtp.gmail.com with ESMTPSA id r27-20020a2eb61b000000b0025e739cd9a7sm1747902ljn.101.2022.08.16.07.03.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Aug 2022 07:03:20 -0700 (PDT) From: Linus Walleij To: linux-crypto@vger.kernel.org, Herbert Xu , "David S . Miller" Cc: phone-devel@vger.kernel.org, Stefan Hansson , Linus Walleij Subject: [PATCH v3 07/16] crypto: ux500/hash: Rename and switch type of member Date: Tue, 16 Aug 2022 16:00:40 +0200 Message-Id: <20220816140049.102306-8-linus.walleij@linaro.org> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20220816140049.102306-1-linus.walleij@linaro.org> References: <20220816140049.102306-1-linus.walleij@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org The "updated" member of the context is very confusing, it actually means "hw_intialized" so rename it to this and switch it to a bool so it is clear how this is used. Signed-off-by: Linus Walleij --- ChangeLog v2->v3: - Rebased on v6.0-rc1 ChangeLog v1->v2: - No changes --- drivers/crypto/ux500/hash/hash_alg.h | 4 ++-- drivers/crypto/ux500/hash/hash_core.c | 14 +++++++------- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/crypto/ux500/hash/hash_alg.h b/drivers/crypto/ux500/hash/hash_alg.h index 00730c0090ae..d124fd17519f 100644 --- a/drivers/crypto/ux500/hash/hash_alg.h +++ b/drivers/crypto/ux500/hash/hash_alg.h @@ -336,12 +336,12 @@ struct hash_ctx { * @state: The state of the current calculations. * @dma_mode: Used in special cases (workaround), e.g. need to change to * cpu mode, if not supported/working in dma mode. - * @updated: Indicates if hardware is initialized for new operations. + * @hw_initialized: Indicates if hardware is initialized for new operations. */ struct hash_req_ctx { struct hash_state state; bool dma_mode; - u8 updated; + bool hw_initialized; }; /** diff --git a/drivers/crypto/ux500/hash/hash_core.c b/drivers/crypto/ux500/hash/hash_core.c index b559c53dc703..c5cd9a5f7e5c 100644 --- a/drivers/crypto/ux500/hash/hash_core.c +++ b/drivers/crypto/ux500/hash/hash_core.c @@ -449,7 +449,7 @@ static int ux500_hash_init(struct ahash_request *req) ctx->keylen = 0; memset(&req_ctx->state, 0, sizeof(struct hash_state)); - req_ctx->updated = 0; + req_ctx->hw_initialized = false; if (hash_mode == HASH_MODE_DMA) { if (req->nbytes < HASH_DMA_ALIGN_SIZE) { req_ctx->dma_mode = false; /* Don't use DMA */ @@ -674,7 +674,7 @@ static int hash_process_data(struct hash_device_data *device_data, break; } - if (req_ctx->updated) { + if (req_ctx->hw_initialized) { ret = hash_resume_state(device_data, &device_data->state); memmove(req_ctx->state.buffer, @@ -694,7 +694,7 @@ static int hash_process_data(struct hash_device_data *device_data, __func__); goto out; } - req_ctx->updated = 1; + req_ctx->hw_initialized = true; } /* * If 'data_buffer' is four byte aligned and @@ -759,7 +759,7 @@ static int hash_dma_final(struct ahash_request *req) dev_dbg(device_data->dev, "%s: (ctx=0x%lx)!\n", __func__, (unsigned long)ctx); - if (req_ctx->updated) { + if (req_ctx->hw_initialized) { ret = hash_resume_state(device_data, &device_data->state); if (ret) { @@ -794,7 +794,7 @@ static int hash_dma_final(struct ahash_request *req) /* Number of bits in last word = (nbytes * 8) % 32 */ HASH_SET_NBLW((req->nbytes * 8) % 32); - req_ctx->updated = 1; + req_ctx->hw_initialized = true; } /* Store the nents in the dma struct. */ @@ -857,7 +857,7 @@ static int hash_hw_final(struct ahash_request *req) dev_dbg(device_data->dev, "%s: (ctx=0x%lx)!\n", __func__, (unsigned long)ctx); - if (req_ctx->updated) { + if (req_ctx->hw_initialized) { ret = hash_resume_state(device_data, &device_data->state); if (ret) { @@ -899,7 +899,7 @@ static int hash_hw_final(struct ahash_request *req) goto out; } - if (!req_ctx->updated) { + if (!req_ctx->hw_initialized) { ret = init_hash_hw(device_data, ctx); if (ret) { dev_err(device_data->dev,