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[90.63.244.31]) by smtp.googlemail.com with ESMTPSA id p3-20020a5d59a3000000b0020a9132d1fbsm11101003wrr.37.2022.04.25.13.21.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Apr 2022 13:21:51 -0700 (PDT) From: Corentin Labbe To: heiko@sntech.de, herbert@gondor.apana.org.au, krzysztof.kozlowski+dt@linaro.org, robh+dt@kernel.org Cc: linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Corentin Labbe Subject: [PATCH v6 25/33] dt-bindings: crypto: rockchip: convert to new driver bindings Date: Mon, 25 Apr 2022 20:21:11 +0000 Message-Id: <20220425202119.3566743-26-clabbe@baylibre.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220425202119.3566743-1-clabbe@baylibre.com> References: <20220425202119.3566743-1-clabbe@baylibre.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org The latest addition to the rockchip crypto driver need to update the driver bindings. Signed-off-by: Corentin Labbe --- .../crypto/rockchip,rk3288-crypto.yaml | 85 +++++++++++++++++-- 1 file changed, 77 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/crypto/rockchip,rk3288-crypto.yaml b/Documentation/devicetree/bindings/crypto/rockchip,rk3288-crypto.yaml index 8a219d439d02..ad604d7e4bc0 100644 --- a/Documentation/devicetree/bindings/crypto/rockchip,rk3288-crypto.yaml +++ b/Documentation/devicetree/bindings/crypto/rockchip,rk3288-crypto.yaml @@ -13,6 +13,8 @@ properties: compatible: enum: - rockchip,rk3288-crypto + - rockchip,rk3328-crypto + - rockchip,rk3399-crypto reg: maxItems: 1 @@ -21,21 +23,88 @@ properties: maxItems: 1 clocks: + minItems: 3 maxItems: 4 clock-names: - items: - - const: aclk - - const: hclk - - const: sclk - - const: apb_pclk + minItems: 3 + maxItems: 4 resets: - maxItems: 1 + minItems: 1 + maxItems: 3 reset-names: - items: - - const: crypto-rst + minItems: 1 + maxItems: 3 + +allOf: + - if: + properties: + compatible: + contains: + const: rockchip,rk3288-crypto + then: + properties: + clocks: + minItems: 4 + clock-names: + items: + - const: "aclk" + - const: "hclk" + - const: "sclk" + - const: "apb_pclk" + minItems: 4 + resets: + maxItems: 1 + reset-names: + items: + - const: "crypto-rst" + maxItems: 1 + - if: + properties: + compatible: + contains: + const: rockchip,rk3328-crypto + then: + properties: + clocks: + maxItems: 3 + clock-names: + items: + - const: "hclk_master" + - const: "hclk_slave" + - const: "sclk" + maxItems: 3 + resets: + maxItems: 1 + reset-names: + items: + - const: "crypto-rst" + maxItems: 1 + - if: + properties: + compatible: + contains: + const: rockchip,rk3399-crypto + then: + properties: + clocks: + maxItems: 3 + clock-names: + items: + - const: "hclk_master" + - const: "hclk_slave" + - const: "sclk" + maxItems: 3 + resets: + minItems: 3 + reset-names: + items: + - const: "rst_master" + - const: "rst_slave" + - const: "crypto-rst" + minItems: 3 required: - compatible