diff mbox series

[v2,15/16] crypto: qat - use u32 variables in all GEN4 pfvf_ops

Message ID 20220407165455.256777-16-marco.chiappero@intel.com
State Accepted
Commit fa374954836779a08cfb773ff20fe2083cb9d420
Headers show
Series crypto: qat - misc fixes | expand

Commit Message

Marco Chiappero April 7, 2022, 4:54 p.m. UTC 
Change adf_gen4_enable_vf2pf_interrupts() to use a u32 variable,
consistently with both other GEN4 pfvf_ops and pfvf_ops of other
generations.

Signed-off-by: Marco Chiappero <marco.chiappero@intel.com>
Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
---
 drivers/crypto/qat/qat_common/adf_gen4_pfvf.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/drivers/crypto/qat/qat_common/adf_gen4_pfvf.c b/drivers/crypto/qat/qat_common/adf_gen4_pfvf.c
index 8091fc52e13a..73ec8defb2d3 100644
--- a/drivers/crypto/qat/qat_common/adf_gen4_pfvf.c
+++ b/drivers/crypto/qat/qat_common/adf_gen4_pfvf.c
@@ -40,7 +40,7 @@  static u32 adf_gen4_pf_get_vf2pf_offset(u32 i)
 static void adf_gen4_enable_vf2pf_interrupts(void __iomem *pmisc_addr,
 					     u32 vf_mask)
 {
-	unsigned int val;
+	u32 val;
 
 	val = ADF_CSR_RD(pmisc_addr, ADF_4XXX_VM2PF_MSK) & ~vf_mask;
 	ADF_CSR_WR(pmisc_addr, ADF_4XXX_VM2PF_MSK, val);