From patchwork Wed Jan 12 21:12:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chang S. Bae" X-Patchwork-Id: 531635 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A4B22C433EF for ; Wed, 12 Jan 2022 21:20:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231421AbiALVUt (ORCPT ); Wed, 12 Jan 2022 16:20:49 -0500 Received: from mga03.intel.com ([134.134.136.65]:1421 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230515AbiALVUl (ORCPT ); Wed, 12 Jan 2022 16:20:41 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1642022441; x=1673558441; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=1V/dk8Rvp2t7cZ0TsHo5VqbvzAF7aweSJpF+npM/Zw4=; b=KXoEhvaBEz0hIHeg/nQK9so7j46K5Ug2Y6jWJri2vevFKuX+l5Kxs4sx PI9QCfDix5kmtXc62jwFWXizWKZvqw+aIzEHJoW+Za/HshrM8f5JZy5xY CWp3gJU8RT/TYzKJ8hk7nRo56KPstCHqniclwEPw0FHlfigpyYAQ4+33p uQkXilWJAj9+3/knd5wCVuMU5Zw+zFJ/KDGGu/8F5o766suQXfua0HH50 p6ySnAJdxnCYU9q3A0j4RzenW7knPe9L9XXBbsPtFLkVjWs7mehTL7SO5 P0x5G1IeXkevOhmy64dy3gL1G2+TcUxPAK34YERSW+kB6SF5FH81bKJWZ A==; X-IronPort-AV: E=McAfee;i="6200,9189,10225"; a="243810792" X-IronPort-AV: E=Sophos;i="5.88,284,1635231600"; d="scan'208";a="243810792" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jan 2022 13:20:40 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,284,1635231600"; d="scan'208";a="529378253" Received: from chang-linux-3.sc.intel.com ([172.25.66.175]) by orsmga008.jf.intel.com with ESMTP; 12 Jan 2022 13:20:39 -0800 From: "Chang S. Bae" To: linux-crypto@vger.kernel.org, dm-devel@redhat.com, herbert@gondor.apana.org.au, ebiggers@kernel.org, ardb@kernel.org, x86@kernel.org, luto@kernel.org, tglx@linutronix.de, bp@suse.de, dave.hansen@linux.intel.com, mingo@kernel.org Cc: linux-kernel@vger.kernel.org, dan.j.williams@intel.com, charishma1.gairuboyina@intel.com, kumar.n.dwarakanath@intel.com, ravi.v.shankar@intel.com, chang.seok.bae@intel.com Subject: [PATCH v5 06/12] x86/keylocker: Define Key Locker CPUID leaf Date: Wed, 12 Jan 2022 13:12:52 -0800 Message-Id: <20220112211258.21115-7-chang.seok.bae@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220112211258.21115-1-chang.seok.bae@intel.com> References: <20220112211258.21115-1-chang.seok.bae@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org Define the feature-specific CPUID leaf and bits. Both Key Locker enabling code in the x86 core and AES Key Locker code in the crypto library will reference them. Signed-off-by: Chang S. Bae Reviewed-by: Dan Williams Cc: x86@kernel.org Cc: linux-kernel@vger.kernel.org --- Changes from RFC v2: * Separate out the code as a new patch. --- arch/x86/include/asm/keylocker.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/x86/include/asm/keylocker.h b/arch/x86/include/asm/keylocker.h index df84c83228a1..e85dfb6c1524 100644 --- a/arch/x86/include/asm/keylocker.h +++ b/arch/x86/include/asm/keylocker.h @@ -5,6 +5,7 @@ #ifndef __ASSEMBLY__ +#include #include /** @@ -21,5 +22,11 @@ struct iwkey { struct reg_128_bit encryption_key[2]; }; +#define KEYLOCKER_CPUID 0x019 +#define KEYLOCKER_CPUID_EAX_SUPERVISOR BIT(0) +#define KEYLOCKER_CPUID_EBX_AESKLE BIT(0) +#define KEYLOCKER_CPUID_EBX_WIDE BIT(2) +#define KEYLOCKER_CPUID_EBX_BACKUP BIT(4) + #endif /*__ASSEMBLY__ */ #endif /* _ASM_KEYLOCKER_H */