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[92.34.204.253]) by smtp.gmail.com with ESMTPSA id m4sm3699740ljc.20.2021.05.11.06.29.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 May 2021 06:29:43 -0700 (PDT) From: Linus Walleij To: Matt Mackall , Herbert Xu , Deepak Saxena Cc: linux-crypto@vger.kernel.org, Arnd Bergmann , Linus Walleij Subject: [PATCH 5/5] hw_random: ixp4xx: Add OF support Date: Tue, 11 May 2021 15:29:28 +0200 Message-Id: <20210511132928.814697-5-linus.walleij@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210511132928.814697-1-linus.walleij@linaro.org> References: <20210511132928.814697-1-linus.walleij@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org This makes the hardware random number generator found in the IXP46x SoCs probe from the device tree. Cc: Deepak Saxena Signed-off-by: Linus Walleij --- The idea is to apply this through the ARM SoC tree along with other IXP4xx refactorings. Please tell me if you prefer another solution. --- drivers/char/hw_random/ixp4xx-rng.c | 10 ++++++++++ 1 file changed, 10 insertions(+) -- 2.30.2 Acked-by: Herbert Xu diff --git a/drivers/char/hw_random/ixp4xx-rng.c b/drivers/char/hw_random/ixp4xx-rng.c index 8b59aeefd4a4..188854dd16a9 100644 --- a/drivers/char/hw_random/ixp4xx-rng.c +++ b/drivers/char/hw_random/ixp4xx-rng.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include @@ -55,9 +56,18 @@ static int ixp4xx_rng_probe(struct platform_device *pdev) return devm_hwrng_register(dev, &ixp4xx_rng_ops); } +static const struct of_device_id ixp4xx_rng_of_match[] = { + { + .compatible = "intel,ixp46x-rng", + }, + {}, +}; +MODULE_DEVICE_TABLE(of, ixp4xx_rng_of_match); + static struct platform_driver ixp4xx_rng_driver = { .driver = { .name = "ixp4xx-hwrandom", + .of_match_table = ixp4xx_rng_of_match, }, .probe = ixp4xx_rng_probe, };