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[209.132.180.67]) by mx.google.com with ESMTP id d23si10177768pfe.339.2017.12.04.04.27.57; Mon, 04 Dec 2017 04:27:57 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ZOYQdiX+; spf=pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753322AbdLDM1y (ORCPT + 1 other); Mon, 4 Dec 2017 07:27:54 -0500 Received: from mail-wm0-f68.google.com ([74.125.82.68]:43939 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753367AbdLDM1w (ORCPT ); Mon, 4 Dec 2017 07:27:52 -0500 Received: by mail-wm0-f68.google.com with SMTP id n138so5458163wmg.2 for ; Mon, 04 Dec 2017 04:27:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Jxuwcw6BxVcDUPRNazZM1ET5ppsEyXX+HMSvldFkj70=; b=ZOYQdiX+S1+XiuFzWfPa4V8n7jUNlVke4o+5BMth07FIyPcI6bnsVvbd41NTUVi+Vt LhOm7LMpQpBC3uiOjGLConmeKSuTD+QskPEEsky74mb3g8+HgGGsb7HhTs7f98Ann2Gw PezeIBOqRiRl9MqHNC7EpOe/n0d/vBv0DjkaE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Jxuwcw6BxVcDUPRNazZM1ET5ppsEyXX+HMSvldFkj70=; b=QNCDXkklNYaIrEhLDOzsVqKaX7dMdRlSgcKZPXB8gHdDrLNMql56Tf3P2TuPn4qvbQ 3WIeK1vf3xx+mE2AS+FYKjecpf6HH86gM11fxzfmx0LnZvrQ1nFYdmL7nPE7lWILKx/W AtsfQO87dSKwuIA/Ga77veQWJnQ6A4PToWLGkgB4oyWMdlTVk4R0J07e+hcyWSF7y7rf Q2jngQSq18FRXAcg9SvrO6ziYkClwGL0Py4ppcH4RWD35D0VfMPQ3s0YTRR+LaIvLYAg Kymhe3+EZlwEnHbZNqdEBag9q21k6aAormmNnwhOWnJRC6n6mERFirCkgcocwwV8IKpv PxpQ== X-Gm-Message-State: AJaThX7GDdwtxOZiidoQy++gX70vFZJK4TKlHZMxQdur/vc6h4OZMjLu ShjzLgc3XzHazzuwF8sJnIDJY2LXfRg= X-Received: by 10.28.216.196 with SMTP id p187mr6453235wmg.158.1512390470671; Mon, 04 Dec 2017 04:27:50 -0800 (PST) Received: from localhost.localdomain ([105.150.171.234]) by smtp.gmail.com with ESMTPSA id a8sm7665839wmh.41.2017.12.04.04.27.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 04 Dec 2017 04:27:50 -0800 (PST) From: Ard Biesheuvel To: linux-crypto@vger.kernel.org Cc: herbert@gondor.apana.org.au, linux-arm-kernel@lists.infradead.org, Ard Biesheuvel , Dave Martin , Russell King - ARM Linux , Sebastian Andrzej Siewior , Mark Rutland , linux-rt-users@vger.kernel.org, Peter Zijlstra , Catalin Marinas , Will Deacon , Steven Rostedt , Thomas Gleixner Subject: [PATCH v2 18/19] crypto: arm64/crct10dif-ce - yield NEON every 8 blocks of input Date: Mon, 4 Dec 2017 12:26:44 +0000 Message-Id: <20171204122645.31535-19-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171204122645.31535-1-ard.biesheuvel@linaro.org> References: <20171204122645.31535-1-ard.biesheuvel@linaro.org> Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org Avoid excessive scheduling delays under a preemptible kernel by yielding the NEON every 8 blocks of input. Signed-off-by: Ard Biesheuvel --- arch/arm64/crypto/crct10dif-ce-core.S | 39 ++++++++++++++++++-- 1 file changed, 35 insertions(+), 4 deletions(-) -- 2.11.0 diff --git a/arch/arm64/crypto/crct10dif-ce-core.S b/arch/arm64/crypto/crct10dif-ce-core.S index d5b5a8c038c8..d57067e80bae 100644 --- a/arch/arm64/crypto/crct10dif-ce-core.S +++ b/arch/arm64/crypto/crct10dif-ce-core.S @@ -74,13 +74,22 @@ .text .cpu generic+crypto - arg1_low32 .req w0 - arg2 .req x1 - arg3 .req x2 + arg1_low32 .req w19 + arg2 .req x20 + arg3 .req x21 vzr .req v13 ENTRY(crc_t10dif_pmull) + stp x29, x30, [sp, #-176]! + mov x29, sp + stp x19, x20, [sp, #16] + stp x21, x22, [sp, #32] + + mov arg1_low32, w0 + mov arg2, x1 + mov arg3, x2 + movi vzr.16b, #0 // init zero register // adjust the 16-bit initial_crc value, scale it to 32 bits @@ -175,8 +184,27 @@ CPU_LE( ext v12.16b, v12.16b, v12.16b, #8 ) subs arg3, arg3, #128 // check if there is another 64B in the buffer to be able to fold - b.ge _fold_64_B_loop + b.lt _fold_64_B_end + + yield_neon_pre arg3, 3, 128, _fold_64_B_loop // yield every 8 blocks + stp q0, q1, [sp, #48] + stp q2, q3, [sp, #80] + stp q4, q5, [sp, #112] + stp q6, q7, [sp, #144] + yield_neon_post 2f + b _fold_64_B_loop + + .subsection 1 +2: ldp q0, q1, [sp, #48] + ldp q2, q3, [sp, #80] + ldp q4, q5, [sp, #112] + ldp q6, q7, [sp, #144] + ldr q10, rk3 + movi vzr.16b, #0 // init zero register + b _fold_64_B_loop + .previous +_fold_64_B_end: // at this point, the buffer pointer is pointing at the last y Bytes // of the buffer the 64B of folded data is in 4 of the vector // registers: v0, v1, v2, v3 @@ -304,6 +332,9 @@ _barrett: _cleanup: // scale the result back to 16 bits lsr x0, x0, #16 + ldp x19, x20, [sp, #16] + ldp x21, x22, [sp, #32] + ldp x29, x30, [sp], #176 ret _less_than_128: