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[209.132.180.67]) by mx.google.com with ESMTP id 38si3348411pld.76.2017.07.24.03.28.43; Mon, 24 Jul 2017 03:28:44 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.b=ende+AQG; spf=pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752201AbdGXK2m (ORCPT + 1 other); Mon, 24 Jul 2017 06:28:42 -0400 Received: from mail-wr0-f172.google.com ([209.85.128.172]:36960 "EHLO mail-wr0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751559AbdGXK2m (ORCPT ); Mon, 24 Jul 2017 06:28:42 -0400 Received: by mail-wr0-f172.google.com with SMTP id 33so47734538wrz.4 for ; Mon, 24 Jul 2017 03:28:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=gvwr8T/I0jl4cYz9816v2BfDwXlBTA1ygIENM+xFK2s=; b=ende+AQGaysLJTo1XRRkmsrLCiHwe1hL/8OYmxbT+oXXpYKWzgYHPBBhaSOaauhhwq A3FdDeAP3j/PpxbtKuBPUVOFALDW8eJxvWLeno0nseDUB3C0cmdM2aI9128ZvPvKkIUe alu3DTbbF2cf2RU0y+TN9gXGTRGxp5NS9wkxQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=gvwr8T/I0jl4cYz9816v2BfDwXlBTA1ygIENM+xFK2s=; b=KRjPzuJrrgl5CcKkaxJe15moBwc17e2Xr5v9wzW+wc5rVKfCo2k5HBy9yTPLbNYnSo X27b32zmz0msjuojQAw466LGa3C7wmkUbE490L1igILC1Pv8ktZrRv7PZW1QkMdLFmZH ZbOgIiiknsX4ZETvVOXVj2VKLEt/VXPkXY7zHy39togt9WNXUlqHwR5YFzEK8pZDcQJE TtyQDsdIPttn4L6Op1VIjpbFlxa+dQohC0PdRAKmOJ+D2MXB0mcTi2zgOtCGn1beURJW QT6QULSBHvVou4Yo+R9tLLnTABUc5BeCc1Uj162dMs17vrUeLJIdiJrrrZFJggQKGPly BIWQ== X-Gm-Message-State: AIVw111+4zQNBFWFeuGMUF7FB9QLY+3cuffurcdUlCJ8BK7xBvT4SnYe zk1AG/clBA0/KMjqcwuOeQ== X-Received: by 10.223.164.194 with SMTP id h2mr18019311wrb.137.1500892120915; Mon, 24 Jul 2017 03:28:40 -0700 (PDT) Received: from localhost.localdomain ([105.148.195.69]) by smtp.gmail.com with ESMTPSA id v44sm13205400wrb.53.2017.07.24.03.28.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 24 Jul 2017 03:28:40 -0700 (PDT) From: Ard Biesheuvel To: linux-crypto@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: herbert@gondor.apana.org.au, dave.martin@arm.com, Ard Biesheuvel Subject: [PATCH resend 06/18] crypto: arm64/sha1-ce - add non-SIMD generic fallback Date: Mon, 24 Jul 2017 11:28:08 +0100 Message-Id: <20170724102820.16534-7-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170724102820.16534-1-ard.biesheuvel@linaro.org> References: <20170724102820.16534-1-ard.biesheuvel@linaro.org> Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org The arm64 kernel will shortly disallow nested kernel mode NEON, so add a fallback to scalar C code that can be invoked in that case. Signed-off-by: Ard Biesheuvel --- arch/arm64/crypto/Kconfig | 3 ++- arch/arm64/crypto/sha1-ce-glue.c | 18 ++++++++++++++---- 2 files changed, 16 insertions(+), 5 deletions(-) -- 2.9.3 diff --git a/arch/arm64/crypto/Kconfig b/arch/arm64/crypto/Kconfig index 7d75a363e317..5d5953545dad 100644 --- a/arch/arm64/crypto/Kconfig +++ b/arch/arm64/crypto/Kconfig @@ -18,8 +18,9 @@ config CRYPTO_SHA512_ARM64 config CRYPTO_SHA1_ARM64_CE tristate "SHA-1 digest algorithm (ARMv8 Crypto Extensions)" - depends on ARM64 && KERNEL_MODE_NEON + depends on KERNEL_MODE_NEON select CRYPTO_HASH + select CRYPTO_SHA1 config CRYPTO_SHA2_ARM64_CE tristate "SHA-224/SHA-256 digest algorithm (ARMv8 Crypto Extensions)" diff --git a/arch/arm64/crypto/sha1-ce-glue.c b/arch/arm64/crypto/sha1-ce-glue.c index ea319c055f5d..efbeb3e0dcfb 100644 --- a/arch/arm64/crypto/sha1-ce-glue.c +++ b/arch/arm64/crypto/sha1-ce-glue.c @@ -1,7 +1,7 @@ /* * sha1-ce-glue.c - SHA-1 secure hash using ARMv8 Crypto Extensions * - * Copyright (C) 2014 Linaro Ltd + * Copyright (C) 2014 - 2017 Linaro Ltd * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -9,6 +9,7 @@ */ #include +#include #include #include #include @@ -37,8 +38,11 @@ static int sha1_ce_update(struct shash_desc *desc, const u8 *data, { struct sha1_ce_state *sctx = shash_desc_ctx(desc); + if (!may_use_simd()) + return crypto_sha1_update(desc, data, len); + sctx->finalize = 0; - kernel_neon_begin_partial(16); + kernel_neon_begin(); sha1_base_do_update(desc, data, len, (sha1_block_fn *)sha1_ce_transform); kernel_neon_end(); @@ -52,13 +56,16 @@ static int sha1_ce_finup(struct shash_desc *desc, const u8 *data, struct sha1_ce_state *sctx = shash_desc_ctx(desc); bool finalize = !sctx->sst.count && !(len % SHA1_BLOCK_SIZE); + if (!may_use_simd()) + return crypto_sha1_finup(desc, data, len, out); + /* * Allow the asm code to perform the finalization if there is no * partial data and the input is a round multiple of the block size. */ sctx->finalize = finalize; - kernel_neon_begin_partial(16); + kernel_neon_begin(); sha1_base_do_update(desc, data, len, (sha1_block_fn *)sha1_ce_transform); if (!finalize) @@ -71,8 +78,11 @@ static int sha1_ce_final(struct shash_desc *desc, u8 *out) { struct sha1_ce_state *sctx = shash_desc_ctx(desc); + if (!may_use_simd()) + return crypto_sha1_finup(desc, NULL, 0, out); + sctx->finalize = 0; - kernel_neon_begin_partial(16); + kernel_neon_begin(); sha1_base_do_finalize(desc, (sha1_block_fn *)sha1_ce_transform); kernel_neon_end(); return sha1_base_finish(desc, out);