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[209.132.180.67]) by mx.google.com with ESMTP id 33-v6si5585201plf.98.2018.02.27.05.31.11; Tue, 27 Feb 2018 05:31:12 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=GsCQKNlf; spf=pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753297AbeB0NbJ (ORCPT + 1 other); Tue, 27 Feb 2018 08:31:09 -0500 Received: from lelnx193.ext.ti.com ([198.47.27.77]:27567 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753364AbeB0NbI (ORCPT ); Tue, 27 Feb 2018 08:31:08 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id w1RDV57I019543; Tue, 27 Feb 2018 07:31:05 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1519738265; bh=fHuq5/YDgYAUvqieBaNrampkvMBm5cACmHWqHdt/YHE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=GsCQKNlfM81IuOPxQGuJMXknN1zVbFrT+gvW3ZLVFul3b+EL8WdK9s6fphiixYmA8 UbgQb8NI2jsgxzJ4FdDI18WZR1B3YfDBqnfmv5lg8HYk1K9xFeJdGysmJiiZoQJfFf E2g/girunkvTeGrGsop2LsTVDSJUTdDug7NOrVuA= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w1RDV5ri026749; Tue, 27 Feb 2018 07:31:05 -0600 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Tue, 27 Feb 2018 07:31:05 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Tue, 27 Feb 2018 07:31:05 -0600 Received: from gomoku.home (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w1RDUoJ6022412; Tue, 27 Feb 2018 07:31:03 -0600 From: Tero Kristo To: , , , CC: Subject: [PATCH 6/6] crypto: omap-aes: make queue length configurable Date: Tue, 27 Feb 2018 15:30:39 +0200 Message-ID: <1519738239-28616-7-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1519738239-28616-1-git-send-email-t-kristo@ti.com> References: <1519738239-28616-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org Crypto driver queue size can now be configured from userspace. This allows optimizing the queue usage based on use case. Default queue size is still 10 entries. Signed-off-by: Tero Kristo --- drivers/crypto/omap-aes.c | 43 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) -- 1.9.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c index 76bc94f..250880a 100644 --- a/drivers/crypto/omap-aes.c +++ b/drivers/crypto/omap-aes.c @@ -1058,9 +1058,52 @@ static ssize_t fallback_store(struct device *dev, struct device_attribute *attr, return size; } +static ssize_t queue_len_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct omap_aes_dev *dd = dev_get_drvdata(dev); + + return sprintf(buf, "%d\n", dd->engine->queue.max_qlen); +} + +static ssize_t queue_len_store(struct device *dev, + struct device_attribute *attr, const char *buf, + size_t size) +{ + struct omap_aes_dev *dd; + ssize_t status; + long value; + unsigned long flags; + + status = kstrtol(buf, 0, &value); + if (status) + return status; + + if (value < 1) + return -EINVAL; + + /* + * Changing the queue size in fly is safe, if size becomes smaller + * than current size, it will just not accept new entries until + * it has shrank enough. + */ + spin_lock_bh(&list_lock); + list_for_each_entry(dd, &dev_list, list) { + spin_lock_irqsave(&dd->lock, flags); + dd->engine->queue.max_qlen = value; + dd->aead_queue.base.max_qlen = value; + spin_unlock_irqrestore(&dd->lock, flags); + } + spin_unlock_bh(&list_lock); + + return size; +} + +static DEVICE_ATTR_RW(queue_len); static DEVICE_ATTR_RW(fallback); static struct attribute *omap_aes_attrs[] = { + &dev_attr_queue_len.attr, &dev_attr_fallback.attr, NULL, };