From patchwork Tue Feb 27 13:30:38 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 129786 Delivered-To: patch@linaro.org Received: by 10.80.172.228 with SMTP id x91csp280322edc; Tue, 27 Feb 2018 05:31:10 -0800 (PST) X-Google-Smtp-Source: AH8x2266bd4ZbPH+RsGy1wlrJTVn+8jU3s6m2hkwtbkzQPA4AdWuCSWyT6qzPQTW83vaZPcS2bvv X-Received: by 2002:a17:902:8ec6:: with SMTP id x6-v6mr14519190plo.402.1519738270782; Tue, 27 Feb 2018 05:31:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519738270; cv=none; d=google.com; s=arc-20160816; b=TssjNAw4zcmnQOVuP1jytN1MmqobeEQqa/7DI1PpekCWPdy8y42K3MiImRCUWW2wGw 0iCWhmu/NNsgA+cpEBXxZXF4gskWxrS5EnQzzTtSaFAHmO8WEM+pbE8hrXq6NOF/7Umu qTwZRIMVO0Z4PocqP8AU0hVm5/I9+xNCbNYI2lEj267kxgTJiyyna+B7M2x8H7aXzWML SYfR+Thq58DqXCYKadw/9mVnrXQzjMEusP8T5Fft8pQ49azmH9EQ8cTN+cHSWdB5fb9y mSP/Rvvefqt1v8ftpnURdKUjzAsLcF1OfStmFwngB6Qu5LYp83nwNj3zaMDVX/b69DU7 Dv7g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=vWL4arwpUQ0qqVd+7n7mMCq2ctopnMk1s8k5sxeVpTo=; b=EZERKtaOFHGSmW2a3wlBllyY4sHR9k8S3+P9djM7FMyL0hr5p5oY1bzq6+RJFWQtuq VxomJ6AaW7kcUppKFOhtOg+Q2348mYrDxRVCzoBJcfnXwD+hKYfqGsGhRrjNkccuwUUe pXoPLAb4bM/gyycju050EQhvgeb5JE+6QEpd+PozHGtPn/T40aybCJmsK5HT079Tv/xk CGB7v1FZGujXWvdTQvwU2A0h6o9tGYEyfQKp8wCsoE8HqA8Iin66d4h1EQgwHs+fiiEv +kHCfBefexBpco1ZzmtToJdDD2hlfhCoALJkfRIyCDnxQJmU609kO9PgNPjUgkcTovTN hfDQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=B0GsKrea; spf=pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 33-v6si5585201plf.98.2018.02.27.05.31.10; Tue, 27 Feb 2018 05:31:10 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=B0GsKrea; spf=pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753366AbeB0NbI (ORCPT + 1 other); Tue, 27 Feb 2018 08:31:08 -0500 Received: from fllnx210.ext.ti.com ([198.47.19.17]:16969 "EHLO fllnx210.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753297AbeB0NbH (ORCPT ); Tue, 27 Feb 2018 08:31:07 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id w1RDV3Rd031785; Tue, 27 Feb 2018 07:31:03 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1519738263; bh=qBlkH/9ukU40bcks/NSbj7UbJt7SueLCDaUIem7kcTI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=B0GsKreaIvhguEHzgq9MrdStFsy7fqZrW2StgMAr3D+u77ueHdKdFMT5YGdzuwO2x bM+OSJeEN25N8p1BI7u825+9BoSjdS9xN0w8kGvTwO5oMzbq7uNzQLGPj7hUhaGGX+ Tdvl4EzPCRPnIxrc6WKw5d4NBJFeB1vuyD/meqWg= Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w1RDV3b0026604; Tue, 27 Feb 2018 07:31:03 -0600 Received: from DFLE107.ent.ti.com (10.64.6.28) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Tue, 27 Feb 2018 07:31:02 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Tue, 27 Feb 2018 07:31:03 -0600 Received: from gomoku.home (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w1RDUoJ5022412; Tue, 27 Feb 2018 07:31:01 -0600 From: Tero Kristo To: , , , CC: Subject: [PATCH 5/6] crypto: omap-aes: make fallback size configurable Date: Tue, 27 Feb 2018 15:30:38 +0200 Message-ID: <1519738239-28616-6-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1519738239-28616-1-git-send-email-t-kristo@ti.com> References: <1519738239-28616-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org Crypto driver fallback size can now be configured from userspace. This allows optimizing the DMA usage based on use case. Detault fallback size of 200 is still used. Signed-off-by: Tero Kristo --- drivers/crypto/omap-aes.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 47 insertions(+), 1 deletion(-) -- 1.9.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c index fbec0a2..76bc94f 100644 --- a/drivers/crypto/omap-aes.c +++ b/drivers/crypto/omap-aes.c @@ -47,6 +47,8 @@ static LIST_HEAD(dev_list); static DEFINE_SPINLOCK(list_lock); +static int aes_fallback_sz = 200; + #ifdef DEBUG #define omap_aes_read(dd, offset) \ ({ \ @@ -517,7 +519,7 @@ static int omap_aes_crypt(struct ablkcipher_request *req, unsigned long mode) !!(mode & FLAGS_ENCRYPT), !!(mode & FLAGS_CBC)); - if (req->nbytes < 200) { + if (req->nbytes < aes_fallback_sz) { SKCIPHER_REQUEST_ON_STACK(subreq, ctx->fallback); skcipher_request_set_tfm(subreq, ctx->fallback); @@ -1029,6 +1031,44 @@ static int omap_aes_get_res_pdev(struct omap_aes_dev *dd, return err; } +static ssize_t fallback_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + return sprintf(buf, "%d\n", aes_fallback_sz); +} + +static ssize_t fallback_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t size) +{ + ssize_t status; + long value; + + status = kstrtol(buf, 0, &value); + if (status) + return status; + + /* HW accelerator only works with buffers > 9 */ + if (value < 9) { + dev_err(dev, "minimum fallback size 9\n"); + return -EINVAL; + } + + aes_fallback_sz = value; + + return size; +} + +static DEVICE_ATTR_RW(fallback); + +static struct attribute *omap_aes_attrs[] = { + &dev_attr_fallback.attr, + NULL, +}; + +static struct attribute_group omap_aes_attr_group = { + .attrs = omap_aes_attrs, +}; + static int omap_aes_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -1159,6 +1199,12 @@ static int omap_aes_probe(struct platform_device *pdev) } } + err = sysfs_create_group(&dev->kobj, &omap_aes_attr_group); + if (err) { + dev_err(dev, "could not create sysfs device attrs\n"); + goto err_aead_algs; + } + return 0; err_aead_algs: for (i = dd->pdata->aead_algs_info->registered - 1; i >= 0; i--) {