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[209.132.180.67]) by mx.google.com with ESMTP id m11si9340618pgc.389.2017.06.10.09.23.18; Sat, 10 Jun 2017 09:23:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752164AbdFJQXR (ORCPT + 1 other); Sat, 10 Jun 2017 12:23:17 -0400 Received: from mail-wr0-f171.google.com ([209.85.128.171]:36019 "EHLO mail-wr0-f171.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751958AbdFJQXP (ORCPT ); Sat, 10 Jun 2017 12:23:15 -0400 Received: by mail-wr0-f171.google.com with SMTP id v111so58815720wrc.3 for ; Sat, 10 Jun 2017 09:23:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=/ksqrgvTslkMJfq/rms+AOvd8QHemSaHO6eqU/UV6mc=; b=RpPFj0+VNSSWk3dCbM5YuCMNue+WfyQmB7m9L4vGwPHLtjg75VVr3MvS3Jp3IJRVxc eWLN6KiYmvkDgo8dkPZTlkCcwaLH4NQLAUmwqnqxVh0FyVhKMdii6RggF6km5DDahPUo Bq/+6GVSC3oYGeuwKsFyywGfnr5PGW3pS199Y= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=/ksqrgvTslkMJfq/rms+AOvd8QHemSaHO6eqU/UV6mc=; b=Io3QOTABE8+0e6m17JRl/RmmWgK7sZFwsW++RSXKIC49BPKYNPDgl77DoaPpzta8SG ndIkeNaWQ4QRayHiFqEP8oa7iWxAOe5bGgKYIikQFn91cRp5xRYVr9Gv7cxcqI44cdjp /id/ypczI2UYJBGW2wJPzmFU4gfMcluevDx60XOh62CKy5Sw3Px8mKVncJJduJ7DfIKW cc5WdmgrirV4ymlUk+OVLEog3R8iDozV6Fj0g7FoxqGpd+CSTM+0ogf9UEFK5l57F2II xgj8PmOEHc1JBgY/z8a1yiqmwtsJDPr8SQkeP8RU6bHzsdy1wsWDvvoEtN4dXLWTu85t fekA== X-Gm-Message-State: AKS2vOz7QcS/HQihBLrXWTFT55i4vmBaxfYG5lZo/yOayv/Rj4Z+PEsQ Ujz1dWQAh3HCA7mlqhgD4A== X-Received: by 10.28.213.200 with SMTP id m191mr3293158wmg.62.1497111793725; Sat, 10 Jun 2017 09:23:13 -0700 (PDT) Received: from localhost.localdomain ([160.165.120.116]) by smtp.gmail.com with ESMTPSA id k35sm4440181wre.9.2017.06.10.09.23.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 10 Jun 2017 09:23:13 -0700 (PDT) From: Ard Biesheuvel To: linux-crypto@vger.kernel.org, herbert@gondor.apana.org.au, linux-arm-kernel@lists.infradead.org, catalin.marinas@arm.com, will.deacon@arm.com, dave.martin@arm.com Cc: Ard Biesheuvel Subject: [PATCH 04/12] crypto: arm64/crc32 - add non-SIMD scalar fallback Date: Sat, 10 Jun 2017 16:22:50 +0000 Message-Id: <1497111778-4210-5-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1497111778-4210-1-git-send-email-ard.biesheuvel@linaro.org> References: <1497111778-4210-1-git-send-email-ard.biesheuvel@linaro.org> Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org The arm64 kernel will shortly disallow nested kernel mode NEON, so add a fallback to scalar C code that can be invoked in that case. Signed-off-by: Ard Biesheuvel --- arch/arm64/crypto/crc32-ce-glue.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) -- 2.7.4 diff --git a/arch/arm64/crypto/crc32-ce-glue.c b/arch/arm64/crypto/crc32-ce-glue.c index eccb1ae90064..624f4137918c 100644 --- a/arch/arm64/crypto/crc32-ce-glue.c +++ b/arch/arm64/crypto/crc32-ce-glue.c @@ -1,7 +1,7 @@ /* * Accelerated CRC32(C) using arm64 NEON and Crypto Extensions instructions * - * Copyright (C) 2016 Linaro Ltd + * Copyright (C) 2016 - 2017 Linaro Ltd * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -19,6 +19,7 @@ #include #include +#include #include #define PMULL_MIN_LEN 64L /* minimum size of buffer @@ -105,10 +106,10 @@ static int crc32_pmull_update(struct shash_desc *desc, const u8 *data, length -= l; } - if (length >= PMULL_MIN_LEN) { + if (length >= PMULL_MIN_LEN && may_use_simd()) { l = round_down(length, SCALE_F); - kernel_neon_begin_partial(10); + kernel_neon_begin(); *crc = crc32_pmull_le(data, l, *crc); kernel_neon_end(); @@ -137,10 +138,10 @@ static int crc32c_pmull_update(struct shash_desc *desc, const u8 *data, length -= l; } - if (length >= PMULL_MIN_LEN) { + if (length >= PMULL_MIN_LEN && may_use_simd()) { l = round_down(length, SCALE_F); - kernel_neon_begin_partial(10); + kernel_neon_begin(); *crc = crc32c_pmull_le(data, l, *crc); kernel_neon_end();