From patchwork Sun May 28 14:40:26 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 100615 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp1063208qge; Sun, 28 May 2017 07:41:24 -0700 (PDT) X-Received: by 10.98.153.4 with SMTP id d4mr12960168pfe.223.1495982483987; Sun, 28 May 2017 07:41:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1495982483; cv=none; d=google.com; s=arc-20160816; b=SRIeYJfD3F6p7atPOGaHrA/JKcySo+sFg4GNDImNjbam5yAlqp+9iMOw4/iXptiAMI hg1tqPYUb6QCbMyVE7O53ENG7pQpgZ4UHz2o1CEJ+Nh008QluQ194PwtRVNRsfk6GXtK P3OQ7eG6EobqlpqL06sum8TjcLM0WjUR3GJuMAXMN+8UKKr5PPmCz+2VmoeWIZzRL7LH zLlo/ZzVp2K/MTXmroLdR/iVBioFp4kXj9EzmSyWLHtnUUQ23E7peTSYeMLmAoiQ60aq vWd9B2555tZDFqBbE5UFWJoR27Fsa1nbjZFwUxObzJIxPYCDWpULCyN7HcT+KLrrrH0d zh2Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=iFI4L4wF5Y8HpWAuZUlvRXc1ScNeOVLWXx0atm2y7N0=; b=KsvD8p9qMCq3X4yCJG50gW1AlDpAuAKd/spEDNpvJHeHP9JEbkJWJFqKA/XGByE5Q0 El199PB3kWSAluSW9etRyRtYJpZe97LhZwfBILuJnYrMJpAuMBXjS+l+5Fk1EjW98SKD iDCZwc8QVBAO3E7FE+xMXCuKo4GlPHMoz+K4RES2gox+cGVqbEM4J/lEJWABVUmJmIiG iE13Bl4ND8tvf5I2++xmFnByaOCIIl8bfmhsf4rPPEnaT7B/YsZ+c7En0IUya0tOIWBz 2EQrj4+PN6UrHPTnj3JebdlTnp+iIUj6TJzdMsKJCzT5Qsea2/TkN3IqHJBTajIwMXIa NGiw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h83si7521621pfk.207.2017.05.28.07.41.23; Sun, 28 May 2017 07:41:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750891AbdE1Okz (ORCPT + 1 other); Sun, 28 May 2017 10:40:55 -0400 Received: from foss.arm.com ([217.140.101.70]:42086 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750878AbdE1Okx (ORCPT ); Sun, 28 May 2017 10:40:53 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 96C77344; Sun, 28 May 2017 07:40:52 -0700 (PDT) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CB8DD3F52A; Sun, 28 May 2017 07:40:50 -0700 (PDT) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Ofir Drang , linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org Subject: [PATCH 01/12] staging: ccree: correct coding style violations Date: Sun, 28 May 2017 17:40:26 +0300 Message-Id: <1495982440-10047-2-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1495982440-10047-1-git-send-email-gilad@benyossef.com> References: <1495982440-10047-1-git-send-email-gilad@benyossef.com> Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org cc_crypto_ctx.h had multiple coding style violations reported by checkpatch. Fix them all. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/cc_crypto_ctx.h | 66 +++++++++++++++++------------------ 1 file changed, 32 insertions(+), 34 deletions(-) -- 2.1.4 diff --git a/drivers/staging/ccree/cc_crypto_ctx.h b/drivers/staging/ccree/cc_crypto_ctx.h index ac39d34..0823b0f 100644 --- a/drivers/staging/ccree/cc_crypto_ctx.h +++ b/drivers/staging/ccree/cc_crypto_ctx.h @@ -14,7 +14,6 @@ * along with this program; if not, see . */ - #ifndef _CC_CRYPTO_CTX_H_ #define _CC_CRYPTO_CTX_H_ @@ -28,7 +27,7 @@ #define CC_CTX_SIZE_LOG2 7 #endif #endif -#define CC_CTX_SIZE (1<> 2) #define CC_DRV_DES_IV_SIZE 8 @@ -54,13 +53,13 @@ #define CC_AES_KEY_SIZE_MAX CC_AES_256_BIT_KEY_SIZE #define CC_AES_KEY_SIZE_WORDS_MAX (CC_AES_KEY_SIZE_MAX >> 2) -#define CC_MD5_DIGEST_SIZE 16 -#define CC_SHA1_DIGEST_SIZE 20 -#define CC_SHA224_DIGEST_SIZE 28 -#define CC_SHA256_DIGEST_SIZE 32 +#define CC_MD5_DIGEST_SIZE 16 +#define CC_SHA1_DIGEST_SIZE 20 +#define CC_SHA224_DIGEST_SIZE 28 +#define CC_SHA256_DIGEST_SIZE 32 #define CC_SHA256_DIGEST_SIZE_IN_WORDS 8 -#define CC_SHA384_DIGEST_SIZE 48 -#define CC_SHA512_DIGEST_SIZE 64 +#define CC_SHA384_DIGEST_SIZE 48 +#define CC_SHA512_DIGEST_SIZE 64 #define CC_SHA1_BLOCK_SIZE 64 #define CC_SHA1_BLOCK_SIZE_IN_WORDS 16 @@ -83,18 +82,17 @@ #define CC_HMAC_BLOCK_SIZE_MAX CC_HASH_BLOCK_SIZE_MAX -#define CC_MULTI2_SYSTEM_KEY_SIZE 32 -#define CC_MULTI2_DATA_KEY_SIZE 8 -#define CC_MULTI2_SYSTEM_N_DATA_KEY_SIZE (CC_MULTI2_SYSTEM_KEY_SIZE + CC_MULTI2_DATA_KEY_SIZE) -#define CC_MULTI2_BLOCK_SIZE 8 -#define CC_MULTI2_IV_SIZE 8 -#define CC_MULTI2_MIN_NUM_ROUNDS 8 -#define CC_MULTI2_MAX_NUM_ROUNDS 128 - +#define CC_MULTI2_SYSTEM_KEY_SIZE 32 +#define CC_MULTI2_DATA_KEY_SIZE 8 +#define CC_MULTI2_SYSTEM_N_DATA_KEY_SIZE (CC_MULTI2_SYSTEM_KEY_SIZE + \ + CC_MULTI2_DATA_KEY_SIZE) +#define CC_MULTI2_BLOCK_SIZE 8 +#define CC_MULTI2_IV_SIZE 8 +#define CC_MULTI2_MIN_NUM_ROUND 8 +#define CC_MULTI2_MAX_NUM_ROUND 128 #define CC_DRV_ALG_MAX_BLOCK_SIZE CC_HASH_BLOCK_SIZE_MAX - enum drv_engine_type { DRV_ENGINE_NULL = 0, DRV_ENGINE_AES = 1, @@ -178,7 +176,6 @@ enum drv_multi2_mode { DRV_MULTI2_RESERVE32B = S32_MAX }; - /* drv_crypto_key_type[1:0] is mapped to cipher_do[1:0] */ /* drv_crypto_key_type[2] is mapped to cipher_config2 */ enum drv_crypto_key_type { @@ -208,7 +205,6 @@ struct drv_ctx_generic { enum drv_crypto_alg alg; } __attribute__((__may_alias__)); - struct drv_ctx_hash { enum drv_crypto_alg alg; /* DRV_CRYPTO_ALG_HASH */ enum drv_hash_mode mode; @@ -218,13 +214,14 @@ struct drv_ctx_hash { CC_DIGEST_SIZE_MAX]; }; -/* !!!! drv_ctx_hmac should have the same structure as drv_ctx_hash except - k0, k0_size fields */ +/* NOTE! drv_ctx_hmac should have the same structure as drv_ctx_hash except + * k0, k0_size fields + */ struct drv_ctx_hmac { enum drv_crypto_alg alg; /* DRV_CRYPTO_ALG_HMAC */ enum drv_hash_mode mode; u8 digest[CC_DIGEST_SIZE_MAX]; - u32 k0[CC_HMAC_BLOCK_SIZE_MAX/sizeof(u32)]; + u32 k0[CC_HMAC_BLOCK_SIZE_MAX / sizeof(u32)]; u32 k0_size; /* reserve to end of allocated context size */ u8 reserved[CC_CTX_SIZE - 3 * sizeof(u32) - @@ -240,16 +237,17 @@ struct drv_ctx_cipher { u32 key_size; /* numeric value in bytes */ u32 data_unit_size; /* required for XTS */ /* block_state is the AES engine block state. - * It is used by the host to pass IV or counter at initialization. - * It is used by SeP for intermediate block chaining state and for - * returning MAC algorithms results. */ + * It is used by the host to pass IV or counter at initialization. + * It is used by SeP for intermediate block chaining state and for + * returning MAC algorithms results. + */ u8 block_state[CC_AES_BLOCK_SIZE]; u8 key[CC_AES_KEY_SIZE_MAX]; u8 xex_key[CC_AES_KEY_SIZE_MAX]; /* reserve to end of allocated context size */ u32 reserved[CC_DRV_CTX_SIZE_WORDS - 7 - - CC_AES_BLOCK_SIZE/sizeof(u32) - 2 * - (CC_AES_KEY_SIZE_MAX/sizeof(u32))]; + CC_AES_BLOCK_SIZE / sizeof(u32) - 2 * + (CC_AES_KEY_SIZE_MAX / sizeof(u32))]; }; /* authentication and encryption with associated data class */ @@ -269,20 +267,20 @@ struct drv_ctx_aead { u8 key[CC_AES_KEY_SIZE_MAX]; /* reserve to end of allocated context size */ u32 reserved[CC_DRV_CTX_SIZE_WORDS - 8 - - 3 * (CC_AES_BLOCK_SIZE/sizeof(u32)) - - CC_AES_KEY_SIZE_MAX/sizeof(u32)]; + 3 * (CC_AES_BLOCK_SIZE / sizeof(u32)) - + CC_AES_KEY_SIZE_MAX / sizeof(u32)]; }; /*******************************************************************/ /***************** MESSAGE BASED CONTEXTS **************************/ /*******************************************************************/ - /* Get the address of a @member within a given @ctx address - @ctx: The context address - @type: Type of context structure - @member: Associated context field */ -#define GET_CTX_FIELD_ADDR(ctx, type, member) (ctx + offsetof(type, member)) + * @ctx: The context address + * @type: Type of context structure + * @member: Associated context field + */ +#define GET_CTX_FIELD_ADDR(ctx, type, member) ((ctx) + offsetof(type, member)) #endif /* _CC_CRYPTO_CTX_H_ */