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[209.132.180.67]) by mx.google.com with ESMTP id hr5si29379611pac.174.2016.10.18.03.52.35; Tue, 18 Oct 2016 03:52:35 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753461AbcJRKwe (ORCPT + 1 other); Tue, 18 Oct 2016 06:52:34 -0400 Received: from mail-lf0-f47.google.com ([209.85.215.47]:34160 "EHLO mail-lf0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752803AbcJRKwd (ORCPT ); Tue, 18 Oct 2016 06:52:33 -0400 Received: by mail-lf0-f47.google.com with SMTP id b81so337269824lfe.1 for ; Tue, 18 Oct 2016 03:52:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Yb2kiJLbzOqeMgnWp7cWpqnfs0U8XV6Xo5A7Ay+Opyg=; b=Dr4s7edEk8/WXNYxvyIBHAAVeCmelxKM7YpXBjgC7B04YLw6t1VQWfyRW+xmoN/G51 cC/ukD/sdPg4F8I5+r1QPQsxPEFTwob9S3nc356FV5rE6+S2+h9ZEr/f+06AnwEVz9Sw W2dPp03NMTBZV6GJ8o8EoQPkzkGdmI1ezPsic= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Yb2kiJLbzOqeMgnWp7cWpqnfs0U8XV6Xo5A7Ay+Opyg=; b=DNDEUmqoaZ4XkdP81TKz1iMEW3+b/s/aZ3xAc92paSJYMFJY/WeCr/Rarkf12c9Dl0 pMkypBEkGgz3OFfFb8wBU69suKfNEU/SB+Mso1TKS2x5rwggxXq1of5uHdA7cW88+Ihi m+kGs08ECrvoT8yJO9p26jTsnP0yZHijbHCFztfPwHXthHLCoAY+EXvDkNh+6xen/QBf UDvjkKP3JKkb/qbTxsnMZTJZQfHBoNT1T/G+mjlxIFjSg/hU7nijKudr+jr1o+JEa69n qb30EcTasnUeTXMp7DKO6jZo+eHPDQgMWXcY7nFsxNrhKDDuCxFllOpJgm4C1cq1040+ t9hQ== X-Gm-Message-State: AA6/9RkavFr+u3Z6O3A88OZ4kyp5kdcLC5LS86pDgs5x3VXIBjWk8i6e3soirDllbM/MhkFf X-Received: by 10.28.109.24 with SMTP id i24mr232894wmc.111.1476787951929; Tue, 18 Oct 2016 03:52:31 -0700 (PDT) Received: from localhost.localdomain ([105.137.38.75]) by smtp.gmail.com with ESMTPSA id za1sm57784083wjb.8.2016.10.18.03.52.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 18 Oct 2016 03:52:31 -0700 (PDT) From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, linux-crypto@vger.kernel.org, linux@arm.linux.org.uk, herbert@gondor.apana.org.au Cc: steve.capper@linaro.org, Ard Biesheuvel Subject: [PATCH 1/5] ARM: wire up HWCAP2 feature bits to the CPU modalias Date: Tue, 18 Oct 2016 11:52:15 +0100 Message-Id: <1476787939-21889-2-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1476787939-21889-1-git-send-email-ard.biesheuvel@linaro.org> References: <1476787939-21889-1-git-send-email-ard.biesheuvel@linaro.org> Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org Wire up the generic support for exposing CPU feature bits via the modalias in /sys/device/system/cpu. This allows udev to automatically load modules for things like crypto algorithms that are implemented using optional instructions. Signed-off-by: Ard Biesheuvel --- arch/arm/Kconfig | 1 + arch/arm/include/asm/cpufeature.h | 32 ++++++++++++++++++++ 2 files changed, 33 insertions(+) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b5d529fdffab..1a0c6a486a9c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -21,6 +21,7 @@ config ARM select GENERIC_ALLOCATOR select GENERIC_ATOMIC64 if (CPU_V7M || CPU_V6 || !CPU_32v6K || !AEABI) select GENERIC_CLOCKEVENTS_BROADCAST if SMP + select GENERIC_CPU_AUTOPROBE select GENERIC_EARLY_IOREMAP select GENERIC_IDLE_POLL_SETUP select GENERIC_IRQ_PROBE diff --git a/arch/arm/include/asm/cpufeature.h b/arch/arm/include/asm/cpufeature.h new file mode 100644 index 000000000000..19c3dddd901a --- /dev/null +++ b/arch/arm/include/asm/cpufeature.h @@ -0,0 +1,32 @@ +/* + * Copyright (C) 2016 Linaro Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_CPUFEATURE_H +#define __ASM_CPUFEATURE_H + +#include + +/* + * Due to the fact that ELF_HWCAP is a 32-bit type on ARM, and given the number + * of optional CPU features it defines, ARM's CPU capability bits have been + * divided across separate elf_hwcap and elf_hwcap2 variables, each of which + * covers a subset of the available CPU features. + * + * Currently, only a few of those are suitable for automatic module loading + * (which is the primary use case of this facility) and those happen to be all + * covered by HWCAP2. So let's only expose those via the CPU modalias for now. + */ +#define MAX_CPU_FEATURES (8 * sizeof(elf_hwcap2)) +#define cpu_feature(x) ilog2(HWCAP2_ ## x) + +static inline bool cpu_have_feature(unsigned int num) +{ + return elf_hwcap2 & (1UL << num); +} + +#endif