From patchwork Thu May 24 14:19:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 136745 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp2271688lji; Thu, 24 May 2018 07:19:25 -0700 (PDT) X-Google-Smtp-Source: AB8JxZplUOrJzhli2BzOmfomyojCpCVHPsuOtynWP8pmHcLR3MIKtupgWesm/weJajuS9ol7mDKX X-Received: by 2002:a17:902:be0e:: with SMTP id r14-v6mr7621554pls.158.1527171565646; Thu, 24 May 2018 07:19:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527171565; cv=none; d=google.com; s=arc-20160816; b=AnkpglcGteH4pUJIYdzLZfzsHo79s4CxDIRHPQ/TXWt+9EDCW81NdvsYmFhInPADYC sMP6NyjaP1kuVVxMWakiNqyDaVR7Jl9fZ/rcxsOCMX8crnI5pmO1nxbTxdQ+4fO44mTK kZY3PDL6XD2TBqZwVKlFjl5vRKmrGD/eky/DA3mZwJXi+f2nkUJna9FfTs8jJKqsKQ1r m3vqC8peGL/kbLmSYzucgf44xcH5j4fDr/S5OmkQq5E4pKx4besnRCNcUpw27qp3CO1Q DzxIjRfYUkKIVE1bJT8LNJZfprTlydvaTgJ74A08fWcM2pU/CGjE+CyG+Wh0vT+0eAfZ AHuw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :arc-authentication-results; bh=OrBs8EnX4AT6fPLI+qLdONQUkeVV93XGsTaE1wlZf2I=; b=a3CGaHPcdCsz8MdWirHgEb06b8j5RIvdF5o0LA+vXzKOz/I5nahDHLftF5s8uBiQ+7 okjAGFmtPR073dCNcLZCV+j8IgNuCCNBV278cnlYHtRdyNAbp+hOXf+yd31LcMqLcSx+ C8noJwyWXYwM5NDMS8LZc0BanQyE5blSoZrEoYLc+8uo7wzJj0qOKB8dxbEGSrXGQawq rBWH50IAauBBPK+lFhuumGwuOTKSmjo4OQwXE4fOXArAR6v7hb6Y++lhJpM8SM/hZEpu DF68T3QsXg4UvTohBXrFQZE3oYW6DtkayBryG475W9QS18qouy7pW4TLbEPBo0YvZ88j d4UA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p63-v6si12670484pga.484.2018.05.24.07.19.25; Thu, 24 May 2018 07:19:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1031766AbeEXOTX (ORCPT + 1 other); Thu, 24 May 2018 10:19:23 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:45574 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1030516AbeEXOTW (ORCPT ); Thu, 24 May 2018 10:19:22 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B041B1596; Thu, 24 May 2018 07:19:21 -0700 (PDT) Received: from sugar.kfn.arm.com (unknown [10.45.48.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B73723F24A; Thu, 24 May 2018 07:19:17 -0700 (PDT) From: Gilad Ben-Yossef To: Simon Horman , Magnus Damm , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , Herbert Xu , "David S. Miller" Cc: Ofir Drang , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org Subject: [PATCH v2 0/5] crypto: ccree: cleanup, fixes and R-Car enabling Date: Thu, 24 May 2018 15:19:05 +0100 Message-Id: <1527171551-21979-1-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.7.4 Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org The patch set enables the use of CryptoCell found in some Renesas R-Car Salvator-X boards and fixes some driver issues uncovered that prevented to work properly. Changes from v1: - Properly fix the bug that caused us to read a bad signature register rather than dropping the check - Proper DT fields as indicated by Geert Uytterhoeven. - Better clock enabling as suggested by Geert Uytterhoeven. Note! the last two patches in the set depend on the "clk: renesas: r8a7795: Add CR clock" patch from Geert Uytterhoeven. Gilad Ben-Yossef (5): crypto: ccree: correct host regs offset crypto: ccree: better clock handling crypto: ccree: silence debug prints clk: renesas: r8a7795: add ccree clock bindings arm64: dts: renesas: r8a7795: add ccree binding arch/arm64/boot/dts/renesas/r8a7795.dtsi | 9 +++++++++ drivers/clk/renesas/r8a7795-cpg-mssr.c | 1 + drivers/crypto/ccree/cc_debugfs.c | 7 +++++-- drivers/crypto/ccree/cc_driver.c | 34 ++++++++++++++++++++++++++------ drivers/crypto/ccree/cc_driver.h | 2 ++ drivers/crypto/ccree/cc_host_regs.h | 6 ++++-- 6 files changed, 49 insertions(+), 10 deletions(-) -- 2.7.4