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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Balakrishna Godavarthi , Rocky Liao , Marcel Holtmann , Johan Hedberg , Luiz Augusto von Dentz , Andy Gross , Bjorn Andersson , Konrad Dybcio Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-bluetooth@vger.kernel.org, linux-arm-msm@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1815; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=Va4r27isBs25sJPIEZ38aWK90w1x70ep0+AkoTYKvbY=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBkkcOK4CONe1XaV099T9h5mJcekZZOlVtdrgy0r17N B/6lh+2JAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZJHDigAKCRB33NvayMhJ0ULkD/ 4pVknVxFJ/LWDimxDS4wsWY2u8Jq0/u8B8C3+B+Jksc76XSQ2ZSLDdXGE2oMTJWj4XUJYnxWAJiCDw pYJc0Q66O73wzMMP5IR2DruD5V3hTcRkXO5evjCVQ1fHSEDNyz/iv91/sH1J0xHbZ9vXH4Xq9PbyX4 SdqAHcEgM5fGgodDOlYnCtifNKTcjPId8IKcrxgyUfOIxesQkesW+M6Ww8HL+cPGU9kmuNgA/ZAjnC w/zantSk5vtiiKGBSSz6lVxQNzxM/ICiavD7nogQYVZUjoLCOi+EW9m2vd0zu7g/fob3gFcHCHqp4I MsCIHcs2VC2kJcacixFCVeXzD3GGC1ALg645H5mmMkSkf9EQmYVfxEq8smtB26oqDNOM+41dQ3f/rv KGrfHSUW7SEC4vxi7+46xra+1/YmifRag+zvyggR89S4EJs938Bh8LhVbL2/EIU3KYWRS8CRmVwlnr Y+VoA1n9jcdikTCXmYFvzhuKMHQE5X+17dgb2BRwJAic+NFbWyjLvgVfY7fQVZkyc0eRnPiMEYabI7 20C6ztTUuA1pzDgYt4ar9lFxaQYlHYpOsaLk/95KUOs8/ptQH4qMqqr92bsGdIdSmZ4DTwZsye8YwD wqQky4nep9uHftjVZLJalG1ozxK3blwfYoDIRUN7seSMfAbJ9JUcJ3fA2liw== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Precedence: bulk List-ID: X-Mailing-List: linux-bluetooth@vger.kernel.org Add the Geni High Speed UART QUP instance 2 element 6 node and associated default pinctrl. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8550.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index 41d60af93692..25dfc5fc5580 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -1053,6 +1053,20 @@ spi13: spi@894000 { status = "disabled"; }; + uart14: uart@898000 { + compatible = "qcom,geni-uart"; + reg = <0 0x898000 0 0x4000>; + clock-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP2_S6_CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_uart14_default>, <&qup_uart14_cts_rts>; + interrupts = ; + interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_2 0>; + interconnect-names = "qup-core", "qup-config"; + status = "disabled"; + }; + i2c15: i2c@89c000 { compatible = "qcom,geni-i2c"; reg = <0 0x0089c000 0 0x4000>; @@ -3471,6 +3485,22 @@ qup_uart7_default: qup-uart7-default-state { bias-disable; }; + qup_uart14_default: qup-uart14-default-state { + /* TX, RX */ + pins = "gpio78", "gpio79"; + function = "qup2_se6"; + drive-strength = <2>; + bias-pull-up; + }; + + qup_uart14_cts_rts: qup-uart14-cts-rts-state { + /* CTS, RTS */ + pins = "gpio76", "gpio77"; + function = "qup2_se6"; + drive-strength = <2>; + bias-pull-down; + }; + sdc2_sleep: sdc2-sleep-state { clk-pins { pins = "sdc2_clk";