From patchwork Tue Nov 27 16:29:07 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 152145 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1486553ljp; Tue, 27 Nov 2018 08:30:16 -0800 (PST) X-Google-Smtp-Source: AFSGD/VJ1eZk/QkR7HBdKsrMXpVRBzeenur77NR4r7WBBGnhP44GtfhZawUQDI+H2cqBS4/B5JC5 X-Received: by 2002:a17:902:280b:: with SMTP id e11mr33127969plb.269.1543336216224; Tue, 27 Nov 2018 08:30:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543336216; cv=none; d=google.com; s=arc-20160816; b=YfHLZWA7dDgGlKT3RLUDmdv3fZ5cUaAf523svVcn/pHsr/9tqdt+zUANh5Lyx92QPB 0vobJn1HCe7MHt2XkOgmz1qFid+U1l7qMo7HowHm6ffFIyhTADE2sBZM6/OcqiQKr74d s4uYFp3DJO6HOYcc62H1cei9cP4hoq01WE1LvUjnHBYMdC7kWyQJUQVVHBT7AawIRt8X /1LLRn07/j24hcH5MrfOuhVuSYf5RoEMBxPAtHdjKiJ82wVGPNx7opT88TZAi5/Rzfkx Ixp5ruWBe9GEXUX9V4I/dd4IqHZeKnNRPTXlCqUCA3iOhpWqTEqk74eGuL/nPINQM7JL U1vA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=4rjnRaV+6g5gOHVzVhs9FARzKLyeED1GNhZcm14IHcQ=; b=UjLyl4WIZfAoeymgt3blavnaMqeuadrItR0pMyHfD1iZXdD/sK+ap5A31DmMAFUBwL n0QpDKDPv8w+3tEEneNcNTt8B4CxWMfdNKsgplx8RNj6B8CcyHIJu8ubn9Z8I/NS9VOq CArHGKcufvqqUQZtE/CTu8HCcuvGnKfaFU8D7ZDjLNlxS0tP8H+cy1WLST96ivMPZngg yjPo91jCKu1kdG1m8rL2m2Sh81NxtP0vMCTy+uh6QZBYE8O4/6SUmVAVt31SMwJfKkNx seWoTpI+meLg0TOkf1t+11xlTXffxzYvKvl285TDD4frgxZZZy0GK6bv5k+Y/5jW9OFW h9SQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=jhHZYN0O; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s24si4396224plq.41.2018.11.27.08.30.15; Tue, 27 Nov 2018 08:30:16 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=jhHZYN0O; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730952AbeK1D2Z (ORCPT + 15 others); Tue, 27 Nov 2018 22:28:25 -0500 Received: from mail-wr1-f67.google.com ([209.85.221.67]:43618 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730444AbeK1D2Z (ORCPT ); Tue, 27 Nov 2018 22:28:25 -0500 Received: by mail-wr1-f67.google.com with SMTP id r10so23332118wrs.10 for ; Tue, 27 Nov 2018 08:29:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=4rjnRaV+6g5gOHVzVhs9FARzKLyeED1GNhZcm14IHcQ=; b=jhHZYN0OjAgFm7nzGlRp1OrMujFZRMpZgk632/l4MgD4u9A3RiATpkOaj8AeDQIAaC cXYMvBBUpOPaFhpsPBJzy7GQNWS+ISQMmszHj7wxoYu0pfHbCWqYoiJmPQAcca6pWh4V kcve0NR1wPcbD+BWZUgsRg2QhU6H3sQXa3hs4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=4rjnRaV+6g5gOHVzVhs9FARzKLyeED1GNhZcm14IHcQ=; b=bMs+NW9o9UB9Dk5RLHb8BqrTb8AlTMEj91NJovQ9W3qAEsv72CtyHC6+Nb3vrm8Kj0 SRfooqOFADogHqMj5lh9Lfr4UKL2R/pAX043wTh20JBXt2g5j2OdanlukBcobrFKyclq dfSu2/Ix0t4Ol6zD+suPZY9sGXrY6my0tABWlAD7VqYwIzTilzedZVL9xW2EKtIp5us7 wQJo8MLx8hoL5/xzsgAWWaF+WdBGsLlHmV7wIOihuyQlNGLsxJjqHacJdedyNm9vUUdS S9fo72P9/3ZLdp41b9n6rjCyQuLOs09u42FqVjmnEiKhYtvqDpVxQTtq44j+2/opYOi+ 7LpA== X-Gm-Message-State: AA+aEWbsCt1AFHUph+C5urtXaM5j/bVFUDR0v+E5+ojry3PLSJg7Vzil qkYf9OMa478NR0//UjOU0Hj78Q== X-Received: by 2002:adf:a50c:: with SMTP id i12mr26876754wrb.220.1543336197845; Tue, 27 Nov 2018 08:29:57 -0800 (PST) Received: from localhost ([49.248.92.105]) by smtp.gmail.com with ESMTPSA id v5sm2416870wrr.11.2018.11.27.08.29.55 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 27 Nov 2018 08:29:57 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org Cc: linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, vkoul@kernel.org, khasim.mohammed@linaro.org, David Brown , Rob Herring , Mark Rutland Subject: [PATCH v3 4/4] arm64: dts: qcom: qcs404: Add thermal zones for each sensor Date: Tue, 27 Nov 2018 21:59:07 +0530 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org qcs404 has 10 sensors connected to the single TSENS IP. Define a thermal zone for each of those sensors to expose the temperature of each zone. Signed-off-by: Amit Kucheria Reviewed-by: Vinod Koul Tested-by: Vinod Koul --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 206 +++++++++++++++++++++++++++ 1 file changed, 206 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index 57d14d8f0c90..cbc3fd378893 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -30,6 +30,7 @@ reg = <0x100>; enable-method = "psci"; next-level-cache = <&L2_0>; + #cooling-cells= <2>; }; CPU1: cpu@101 { @@ -38,6 +39,7 @@ reg = <0x101>; enable-method = "psci"; next-level-cache = <&L2_0>; + #cooling-cells= <2>; }; CPU2: cpu@102 { @@ -46,6 +48,7 @@ reg = <0x102>; enable-method = "psci"; next-level-cache = <&L2_0>; + #cooling-cells= <2>; }; CPU3: cpu@103 { @@ -54,6 +57,7 @@ reg = <0x103>; enable-method = "psci"; next-level-cache = <&L2_0>; + #cooling-cells= <2>; }; L2_0: l2-cache { @@ -507,4 +511,206 @@ #interrupt-cells = <2>; }; }; + + thermal-zones { + aoss-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 0>; + + trips { + aoss_alert: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + aoss_crit: trip1 { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + dsp-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 1>; + + trips { + dsp_alert: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + dsp_crit: trip1 { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + lpass-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 2>; + + trips { + lpass_alert: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + lpass_crit: trip1 { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + wlan-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 3>; + + trips { + wlan_alert: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + wlan_crit: trip1 { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cluster-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 4>; + + trips { + cluster_alert: cluster_alert { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cluster_crit: cluster_crit { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cpu-thermal0 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 5>; + + trips { + cpu_alert0: cpu_alert0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit0: cpu_crit0 { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cpu-thermal1 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 6>; + + trips { + cpu_alert1: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit1: trip1 { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cpu-thermal2 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 7>; + + trips { + cpu_alert2: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit2: trip1 { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cpu-thermal3 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 8>; + + trips { + cpu_alert3: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit3: trip1 { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + gpu-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 9>; + + trips { + gpu_alert: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + gpu_crit: trip1 { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; };