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[209.132.180.67]) by mx.google.com with ESMTP id r71-v6si20639647pfc.253.2018.11.19.04.26.06; Mon, 19 Nov 2018 04:26:06 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="G/8MFWFL"; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728853AbeKSWte (ORCPT + 15 others); Mon, 19 Nov 2018 17:49:34 -0500 Received: from mail-wr1-f67.google.com ([209.85.221.67]:39225 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728782AbeKSWte (ORCPT ); Mon, 19 Nov 2018 17:49:34 -0500 Received: by mail-wr1-f67.google.com with SMTP id b13so31812883wrx.6 for ; Mon, 19 Nov 2018 04:26:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=vbujpZlR3xwCQtHN+6i4d1gyZCoKcwoCzl86pAegAMo=; b=G/8MFWFL/2b/pz78l1CvrUfCvTR63oUZyGVoJDnd4pU0iEETt3KEAIlDSYGzANK6td t/iNHC9qBHA5qlFYMe/gBF7qmX6LhFWfb8wjR0X9PPOgRlYSzX8pOPt9gCDYDufbFxal mM+QOUyUqOHj9uETDRP9NYe/UBH5Li2LC9KT4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=vbujpZlR3xwCQtHN+6i4d1gyZCoKcwoCzl86pAegAMo=; b=jRG0XMqjA4VCwycKwUFtLLCm0/lJByxnV14sTZ49P8/wRGhStvMHXNMxBJOCUjIofJ FzQWWYhYGQ9JASteFImBoGnxQILBHWMO12C2RnqNhpkZRfpRIvfvH/bR0mdJ/lZPclzM oJPNdmHvNzSU0UfG/SF+ezGwM+9avaI7Vkz93WBpoOoZ48n+/NDTemRRUg3weJPy1hPo 33tTzsCh0fzGyXj1unYkoJKxpf/XCJULd52G247vJ3V660GSMg1B7JTM4JOULKvpFuvr Uu1KAlgB87vk0nC/lnWSaGoD811AjklN0OcsahhuWJmr4Pbm/rzJga9bcRRBQltuAfiX M1DA== X-Gm-Message-State: AGRZ1gLObwIQ8sKg0yHcqHkSC10wKJjOLQaHz1/d3L35dV4jNALSvIeB Zy0n2CIS5qyqI4rbcEpMdMJziQ== X-Received: by 2002:adf:df0a:: with SMTP id y10-v6mr18346814wrl.127.1542630364278; Mon, 19 Nov 2018 04:26:04 -0800 (PST) Received: from localhost ([49.248.195.80]) by smtp.gmail.com with ESMTPSA id u8-v6sm27063818wrr.33.2018.11.19.04.26.02 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 19 Nov 2018 04:26:03 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org Cc: linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, vkoul@kernel.org, David Brown , Rob Herring , Mark Rutland Subject: [PATCH v2 3/4] arm64: dts: qcom: qcs404: Add tsens controller Date: Mon, 19 Nov 2018 17:55:21 +0530 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org qcs404 has a single TSENS IP block with 10 sensors. The calibration data is stored in an eeprom (qfprom) that is accessed through the nvmem framework. We add the qfprom node to allow the tsens sensors to be calibrated correctly. Signed-off-by: Amit Kucheria Reviewed-by: Vinod Koul Tested-by: Vinod Koul --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index 9b5c16562bbe4..57d14d8f0c901 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -253,6 +253,16 @@ reg = <0x00060000 0x6000>; }; + qfprom: qfprom@a4000 { + compatible = "qcom,qfprom"; + reg = <0x000a4000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + tsens_caldata: caldata@d0 { + reg = <0x1f8 0x14>; + }; + }; + rng: rng@e3000 { compatible = "qcom,prng-ee"; reg = <0x000e3000 0x1000>; @@ -260,6 +270,16 @@ clock-names = "core"; }; + tsens: thermal-sensor@4a9000 { + compatible = "qcom,qcs404-tsens", "qcom,tsens-v1"; + reg = <0x004a9000 0x1000>, /* TM */ + <0x004a8000 0x1000>; /* SROT */ + nvmem-cells = <&tsens_caldata>; + nvmem-cell-names = "calib"; + #qcom,sensors = <10>; + #thermal-sensor-cells = <1>; + }; + tlmm: pinctrl@1000000 { compatible = "qcom,qcs404-pinctrl"; reg = <0x01000000 0x200000>,