From patchwork Mon Nov 19 12:25:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 151483 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2598089ljp; Mon, 19 Nov 2018 04:25:48 -0800 (PST) X-Google-Smtp-Source: AJdET5diSDGtTHommadQbVeTQ5n3z+uU8dNjjGeTBgtELzTyynFXeoFBpiqO5lxSIOKWySft70c1 X-Received: by 2002:a63:7f4f:: with SMTP id p15mr19979715pgn.296.1542630348254; Mon, 19 Nov 2018 04:25:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542630348; cv=none; d=google.com; s=arc-20160816; b=ji9B8M2aTVTCN6Skzog0clhLgHOJzwt+cL5zp9kMz9yT8mLz7pcGITaC32RRe3BoZQ aZ0p++lBn5hqR/SbhSF0CvzjwK9DuCcpMOGJQJS2dz993fiadsdErAgRqfKfSVXQctZx augNfgoH3Xjfs8eXoLvKqM1MdJwZ2RHyIJLa/em4Lt5VRghgY+R3NWxcJXq4bgeEIk+m 6lpht7Ud6SwGgubm/W4xIzWl6tiZB6+833S6t4PUR/QYEasvn2KNgTi9m2jez4cdIsBP nq59Upj+iQSOZQoMLDhe0MEETM+0/uEmtWJIdy5DcNVvkoS4yt7db7Pt2pbWrqAS8llK nAHQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=e94DIEaO20VLtFTPXBdeuigr1I2rzbvph1yIasDBL34=; b=SyCTUnjzRJ89ZGCmRKFoPSqWrWCQVxBmF25XM6e8aE3fRilELaXQwVVbDsYHjr9x6l Ji8D09pj22klskWFu14zOpOTFGnz79GF+so0lPvj8jNxthyEO783/dyMTWRawVEbkGq/ GPJx7U9FSjEh4N35wv7GoU3i6y8kxkeNh9WkXBi90i/ELuAA2RcZzROYswlBQ37vb7Rh UfTw90ujeZHyKLHMVDPa3KG2OAx7bEHrX/Zqf0tkX11ey5fxm0/m0vygYnGvhDAHZjFC lxtdxFp6G4YGESF69dHHhUg8aZgP/Qs/LHAEuVP1/vPkgRqH3pb+vFn52iWgWzY572CI 01tQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Ey27Y8J2; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n5si26787732pgh.422.2018.11.19.04.25.48; Mon, 19 Nov 2018 04:25:48 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Ey27Y8J2; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728769AbeKSWtP (ORCPT + 15 others); Mon, 19 Nov 2018 17:49:15 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:42414 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728579AbeKSWtP (ORCPT ); Mon, 19 Nov 2018 17:49:15 -0500 Received: by mail-wr1-f65.google.com with SMTP id u5-v6so26544432wrn.9 for ; Mon, 19 Nov 2018 04:25:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=e94DIEaO20VLtFTPXBdeuigr1I2rzbvph1yIasDBL34=; b=Ey27Y8J2YhDE6+lRkH45SC/ejdTI66xX5FYehwkoJNLKYb2WF+BiAYZkU3ZNZXYALm KIk21DyB6303cxBETEvNWE8CyCVt82fCJc0SAI515Ohhw/5xoHhKVCy0UP4lkDSsVY5R jCiuIVulkdgN8ok5R4m/FcpkxJ4p7OGfHnAZA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=e94DIEaO20VLtFTPXBdeuigr1I2rzbvph1yIasDBL34=; b=mqp9SWoZYmaBzgTYkYix2kkJLpuqcsYdmpYWnHnpSzFKtzLJOmIEvnkDYtguOSKWgc XDuUFlvC0/Ym+Bvh4kjkWVUGcbpdPuMPwwim8RIe45diqhb0iqd3AfxkOTOUO/B7wwon hAVKgXPxLxW7g3nUeu6Lv7usHBxqzNVsAD6lkHps0CaY2hvLoIhAt5k8GCy7UVVdh66C iIDXHDOEGyrk3SA1tpxsdvk6AhfX8/Sgtc0wvvig39T4diGr6W51x4jkOaOUeEKU/mgs DGyaU0hdiouRttsTsLSYBMSODxpMysAY1Td75ypl//O7djG300scDCSfwTaKMA2gUaye n1MQ== X-Gm-Message-State: AGRZ1gK60edugLkR9WoDPZXU7/pK4XD0DOmtveG8sOsoxjOBE44Fq0VE vjP82SWKh+VVw+Gs8fyqUiuEGEBMqR8= X-Received: by 2002:a05:6000:1009:: with SMTP id a9mr17527207wrx.271.1542630345269; Mon, 19 Nov 2018 04:25:45 -0800 (PST) Received: from localhost ([49.248.195.80]) by smtp.gmail.com with ESMTPSA id h67-v6sm42241111wma.10.2018.11.19.04.25.43 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 19 Nov 2018 04:25:44 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org Cc: linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, vkoul@kernel.org, Zhang Rui , Daniel Lezcano , Rob Herring , Mark Rutland Subject: [PATCH v2 1/4] dt: thermal: tsens: Add bindings for qcs404 Date: Mon, 19 Nov 2018 17:55:19 +0530 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org qcs404 uses v1 of the TSENS IP block. Create a fallback DT property "qcom,tsens-v1" to gather common code. Signed-off-by: Amit Kucheria Reviewed-by: Vinod Koul Tested-by: Vinod Koul --- Documentation/devicetree/bindings/thermal/qcom-tsens.txt | 3 +++ 1 file changed, 3 insertions(+) -- 2.17.1 diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.txt b/Documentation/devicetree/bindings/thermal/qcom-tsens.txt index 1d9e8cf610181..799de30623522 100644 --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.txt +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.txt @@ -8,9 +8,12 @@ Required properties: - "qcom,msm8996-tsens" (MSM8996) - "qcom,msm8998-tsens", "qcom,tsens-v2" (MSM8998) - "qcom,sdm845-tsens", "qcom,tsens-v2" (SDM845) + - "qcom,qcs404-tsens", "qcom,tsens-v1" (QCS404) The generic "qcom,tsens-v2" property must be used as a fallback for any SoC with version 2 of the TSENS IP. MSM8996 is the only exception because the generic property did not exist when support was added. + Similarly, the generic "qcom,tsens-v1" property must be used as a fallback for + any SoC with version 1 of the TSENS IP. - reg: Address range of the thermal registers. New platforms containing v2.x.y of the TSENS IP must specify the SROT and TM