From patchwork Thu Jun 29 09:19:59 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 106624 Delivered-To: patch@linaro.org Received: by 10.140.101.44 with SMTP id t41csp863693qge; Thu, 29 Jun 2017 02:20:33 -0700 (PDT) X-Received: by 10.84.169.67 with SMTP id g61mr16702953plb.250.1498728033210; Thu, 29 Jun 2017 02:20:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1498728033; cv=none; d=google.com; s=arc-20160816; b=Lkxkiyy7ywTr2kJ1NvvsB3jVsJqa41sZZ8J+twfI0U6Gkp3t7sLer5d4BXT2czoW8O UnAPtq7jTGZ6VpQ6XpToN679gBTIGzBr5j7SZeMQ2SOEfMFthMIPB0BHr00xc2+nxhvQ Q4hM9NtWOxh1be4Qr7Z0hEe1oTuoetX/MDsG+276zM4gDiw3vDUFgD4vhRzMeq5M59O3 njLv89ifJP22lyPzIj3u5urKJqu4vvK0ykvwX6F8k0W7M9MRTdAIrOOOcpwBvo6TFIZ5 UsxjBLeEfugz+AZAlwhp7GrSQXkrsZ/48LEqlzw5u7rPTinDhUA36xM/qOqtqQiLq4D2 N4Ow== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=k0YrOI5JP8tlJ7e3E8C8rQB/GvMLpZ5Qnfe7cBGgc2k=; b=LqzbkCoait/TG3CUIyEnXcTTJiiytc0MnFTzo9nsKRJCO0cVDDD5gS+ou0ZhXso+Q/ pMUKvFLIBOtkU1HRkMHhl6EADkVI0ui9EcbixKtpW167/bBmfbrgjJpCEgZ/KHLu8unq XFGMbIh6mUKgC7x7pw/j9TwGFUvVZEGh1zymsW8yWMQxkMFbuMnzaw2KBI78sqXFFvzY T5ro3XJlaI7DGv0SswUIRVvOu50vfD9ZXu8HNHCDdo/o7nXBQ6+3WSbnfdmHXVg5sntU WftDYdh9qN1SSWDIsr6q1XdXUpm5hlYTKy+Eg0YISfWkMk7372tl07bD+dGCxUD+X4Qq 3GUw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.b=gAmqj9DR; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l11si3233069pgc.375.2017.06.29.02.20.32; Thu, 29 Jun 2017 02:20:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.b=gAmqj9DR; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751639AbdF2JUV (ORCPT + 10 others); Thu, 29 Jun 2017 05:20:21 -0400 Received: from mail-pf0-f181.google.com ([209.85.192.181]:35409 "EHLO mail-pf0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751861AbdF2JUN (ORCPT ); Thu, 29 Jun 2017 05:20:13 -0400 Received: by mail-pf0-f181.google.com with SMTP id c73so47502729pfk.2 for ; Thu, 29 Jun 2017 02:20:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=7fPhUVMNfmTyxMgMLTkNLjokZFTlhvY5NX0Kt4EprBo=; b=gAmqj9DR2uFE6H844zcHn/KUCkn4uG6k/TMw10DVWTsug5X7U2BHK3Qo1EmsEF5CNW BQdXHFHAJmytcaF6HoGdVMKrHwLMpgL3IcP9XVroCqVqoW6MPZqIPW5xJ4zaUgRNsfPL RImf0YXik4ljdAD1JcHs94f+obk++T5poILHc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=7fPhUVMNfmTyxMgMLTkNLjokZFTlhvY5NX0Kt4EprBo=; b=fyOcA2HgG5veycXJb7GJm7bRz03PsUfCTyJWoUjdhhjLu0uvMFiaSggxmAtONOzl2t hhdd/dP9jG2CYXvzKMAZmcDNscl9UOBFbKtlCD5c2e6opvCbD2FfnPedERVkQQOfM1J2 Gkea7CxNgasA5n36cL7sIojiVR+UnEIYIspwVAy41WUKrR+fVf4O0OPbRKbd07Fqobxb MJXYGNwbqQPoSKbxUVtyiJKgPMhuZmm0HrkydN+9aVWevxGLf6lKtFxkQxPSFy72l1Sf FpPU+9PnwPL9i8H2YZ/DZ3QboVgfWKgO154akCgqKlmFRaopQAgI9NWm86GjZOGpBcLT y0lA== X-Gm-Message-State: AKS2vOwj1euvPL78n4IbcdXlxxs31RcT69YTIRz9n6HOzTI6qgwE35fB Vwp6OfnBtZ3E5Cr2 X-Received: by 10.98.33.132 with SMTP id o4mr15347329pfj.11.1498728012239; Thu, 29 Jun 2017 02:20:12 -0700 (PDT) Received: from localhost ([122.171.238.149]) by smtp.gmail.com with ESMTPSA id s66sm10369551pfg.21.2017.06.29.02.20.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Jun 2017 02:20:10 -0700 (PDT) From: Viresh Kumar To: Rob Clark Cc: Viresh Kumar , Vincent Guittot , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH] drm/msm/mdp5: Fix compilation warnings Date: Thu, 29 Jun 2017 14:49:59 +0530 Message-Id: <627f428ee808c68e28d9f97a88191fbbe3ed389f.1498727804.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.13.0.71.gd7076ec9c9cb Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Following compilation warnings were observed for these files: CC [M] drivers/gpu/drm/msm/mdp/mdp5/mdp5_mdss.o drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c: In function 'blend_setup': drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c:223:7: warning: missing braces around initializer [-Wmissing-braces] enum mdp5_pipe stage[STAGE_MAX + 1][MAX_PIPE_STAGE] = { SSPP_NONE }; ^ drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c:223:7: warning: (near initialization for 'stage[0]') [-Wmissing-braces] drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c:224:7: warning: missing braces around initializer [-Wmissing-braces] enum mdp5_pipe r_stage[STAGE_MAX + 1][MAX_PIPE_STAGE] = { SSPP_NONE }; ^ drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c:224:7: warning: (near initialization for 'r_stage[0]') [-Wmissing-braces] drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c: In function 'mdp5_plane_mode_set': drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c:892:9: warning: missing braces around initializer [-Wmissing-braces] struct phase_step step = { 0 }; ^ drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c:892:9: warning: (near initialization for 'step.x') [-Wmissing-braces] drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c:893:9: warning: missing braces around initializer [-Wmissing-braces] struct pixel_ext pe = { 0 }; ^ drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c:893:9: warning: (near initialization for 'pe.left') [-Wmissing-braces] This happens because in the first case we were initializing a two dimensional array with {0} and in the second case we were initializing a struct containing two arrays with {0}. Fix them by adding another pair of {}. Signed-off-by: Viresh Kumar --- drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c | 4 ++-- drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) -- 2.13.0.71.gd7076ec9c9cb -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c index 9217e0d6e93e..b2c68072a805 100644 --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c @@ -220,8 +220,8 @@ static void blend_setup(struct drm_crtc *crtc) struct mdp5_ctl *ctl = mdp5_cstate->ctl; uint32_t blend_op, fg_alpha, bg_alpha, ctl_blend_flags = 0; unsigned long flags; - enum mdp5_pipe stage[STAGE_MAX + 1][MAX_PIPE_STAGE] = { SSPP_NONE }; - enum mdp5_pipe r_stage[STAGE_MAX + 1][MAX_PIPE_STAGE] = { SSPP_NONE }; + enum mdp5_pipe stage[STAGE_MAX + 1][MAX_PIPE_STAGE] = { { SSPP_NONE } }; + enum mdp5_pipe r_stage[STAGE_MAX + 1][MAX_PIPE_STAGE] = { { SSPP_NONE } }; int i, plane_cnt = 0; bool bg_alpha_enabled = false; u32 mixer_op_mode = 0; diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c index 7d3741215387..0ee9bd0041cd 100644 --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c @@ -889,8 +889,8 @@ static int mdp5_plane_mode_set(struct drm_plane *plane, struct mdp5_hw_pipe *right_hwpipe; const struct mdp_format *format; uint32_t nplanes, config = 0; - struct phase_step step = { 0 }; - struct pixel_ext pe = { 0 }; + struct phase_step step = { { 0 } }; + struct pixel_ext pe = { { 0 } }; uint32_t hdecm = 0, vdecm = 0; uint32_t pix_format; unsigned int rotation;