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[199.106.103.254]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3124e399b0fsm1615381a91.30.2025.05.30.10.47.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 May 2025 10:47:46 -0700 (PDT) From: Jessica Zhang Date: Fri, 30 May 2025 10:47:26 -0700 Subject: [PATCH v2 3/5] dt-bindings: display/msm: drop assigned-clock-parents for dp controller Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250530-dp_mst_bindings-v2-3-f925464d32a8@oss.qualcomm.com> References: <20250530-dp_mst_bindings-v2-0-f925464d32a8@oss.qualcomm.com> In-Reply-To: <20250530-dp_mst_bindings-v2-0-f925464d32a8@oss.qualcomm.com> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kuogee Hsieh , Abel Vesa , Bjorn Andersson , Michael Turquette , Stephen Boyd , Mahadevan , Krishna Manikandan , Konrad Dybcio , Danila Tikhonov Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Yongxing Mou , Jessica Zhang X-Mailer: b4 0.15-dev-64971 X-Developer-Signature: v=1; a=ed25519-sha256; t=1748627260; l=5805; i=jessica.zhang@oss.qualcomm.com; s=20230329; h=from:subject:message-id; bh=S1XB9+JaEMa3iAt9Xnmf/DC2ThwkEN2OZRdUbvXaoBc=; b=lSebu3NXgPMqfVrX+ZExdEw0Qt9hbmK4Ngu6DhqZ8NRNYqWLC0MYOXj3XB+BigjIDIQIaX7Gu Xns8rhdsQs+CIcPDZ5zlZf1FMy3EZgvEUmv3T8M8JY4/s5MYN9ipqak X-Developer-Key: i=jessica.zhang@oss.qualcomm.com; a=ed25519; pk=gAUCgHZ6wTJOzQa3U0GfeCDH7iZLlqIEPo4rrjfDpWE= X-Authority-Analysis: v=2.4 cv=UOXdHDfy c=1 sm=1 tr=0 ts=6839ef44 cx=c_pps a=oF/VQ+ItUULfLr/lQ2/icg==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=IkcTkHD0fZMA:10 a=dt9VzEwgFbYA:10 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=wErF9Qt5opcPDqNnyToA:9 a=QEXdDO2ut3YA:10 a=3WC7DwWrALyhR5TkjVHa:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-ORIG-GUID: uS8UAzJWt-X9UC0bhMoz3ttLme6weGs9 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNTMwMDE1NiBTYWx0ZWRfX+KCFtciC8fO8 f44W6SSn1ocGomhcxtGc2XXqqLKHmYWpgb6n7yhu2xUZ01ct1Ajy7ro3Q+AXe0UkF0YW1vkI5Xd GD8M1cvxryeIpY22hYjAvGq+onikhsML4HhLq7qf/0OFzXQ+FlYkpzn61zl3uULSRxWmA0xFLA0 zH4zXV6Ll92iG8kfavmN8g3RBLWEbj7CHKT1wbBlbwtC7+KugEL1dGshAYnIcX5ZgmqpF3PinOE gRi58NjVpdoxhiy3FX+51cYeIlSMNO/fyeAEGvIf1ZluDut3ErQ2GDf8rQ7XsyjoATU85iLDP4A w5doS9q+D1i+ocSqll0dMBiRrIIORuHltb4jjpInS8q+lodWM5nJvluB8lejCyNwl1HxECYq70A tlWhbMmssFVZiYd22sOcz2nyf5Wi1cb1gkCiIUwyDoOJ9NE2OIJO2pldcX39BqOuF2fS9RoX X-Proofpoint-GUID: uS8UAzJWt-X9UC0bhMoz3ttLme6weGs9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-05-30_08,2025-05-30_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 phishscore=0 mlxscore=0 adultscore=0 priorityscore=1501 mlxlogscore=942 bulkscore=0 malwarescore=0 impostorscore=0 spamscore=0 suspectscore=0 lowpriorityscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505160000 definitions=main-2505300156 From: Abhinav Kumar Current documentation of assigned-clock-parents for dp controller does not describe its functionality correctly making it harder to extend it for adding multiple streams. Instead of fixing up the documentation, drop the assigned-clock-parents along with the usages in the chipset specific MDSS yaml files. Signed-off-by: Abhinav Kumar Signed-off-by: Jessica Zhang --- Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 7 ------- .../devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml | 1 - .../devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml | 2 -- .../devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml | 1 - .../devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml | 2 -- .../devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml | 2 -- 6 files changed, 15 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index 46a50ca4a986..a63efd8de42c 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -74,11 +74,6 @@ properties: - description: link clock source - description: pixel clock source - assigned-clock-parents: - items: - - description: phy 0 parent - - description: phy 1 parent - phys: maxItems: 1 @@ -208,8 +203,6 @@ examples: assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>, <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>; - assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>; - phys = <&dp_phy>; phy-names = "dp"; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml index 1053b3bc4908..951e446dc828 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml @@ -393,7 +393,6 @@ examples: assigned-clocks = <&dispcc_mdss_dptx0_link_clk_src>, <&dispcc_mdss_dptx0_pixel0_clk_src>; - assigned-clock-parents = <&mdss0_dp0_phy 0>, <&mdss0_dp0_phy 1>; phys = <&mdss0_dp0_phy>; phy-names = "dp"; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml index 870144b53cec..a1f5a6bd328e 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml @@ -216,8 +216,6 @@ examples: assigned-clocks = <&dispcc_disp_cc_mdss_dptx0_link_clk_src>, <&dispcc_disp_cc_mdss_dptx0_pixel0_clk_src>; - assigned-clock-parents = <&usb_dp_qmpphy_QMP_USB43DP_DP_LINK_CLK>, - <&usb_dp_qmpphy_QMP_USB43DP_DP_VCO_DIV_CLK>; phys = <&usb_dp_qmpphy QMP_USB43DP_DP_PHY>; phy-names = "dp"; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml index 7a0555b15ddf..f737a8481acb 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml @@ -269,7 +269,6 @@ examples: "ctrl_link_iface", "stream_pixel"; assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>, <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>; - assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>; phys = <&dp_phy>; phy-names = "dp"; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml index 2947f27e0585..7842ef274258 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml @@ -298,7 +298,6 @@ examples: "stream_pixel"; assigned-clocks = <&dispcc DISP_CC_MDSS_EDP_LINK_CLK_SRC>, <&dispcc DISP_CC_MDSS_EDP_PIXEL_CLK_SRC>; - assigned-clock-parents = <&mdss_edp_phy 0>, <&mdss_edp_phy 1>; phys = <&mdss_edp_phy>; phy-names = "dp"; @@ -389,7 +388,6 @@ examples: "stream_pixel"; assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>, <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>; - assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>; phys = <&dp_phy>; phy-names = "dp"; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml index 13c5d5ffabde..3cea87def9f8 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml @@ -401,8 +401,6 @@ examples: assigned-clocks = <&dispcc_mdss_dp_link_clk_src>, <&dispcc_mdss_dp_pixel_clk_src>; - assigned-clock-parents = <&dp_phy 0>, - <&dp_phy 1>; operating-points-v2 = <&dp_opp_table>; power-domains = <&rpmhpd RPMHPD_CX>;