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Tue, 27 May 2025 07:20:41 +0000 Received: from APTAIPPMTA02.qualcomm.com (APTAIPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 54R7KfF4009573; Tue, 27 May 2025 07:20:41 GMT Received: from cse-cd02-lnx.ap.qualcomm.com (cse-cd02-lnx.qualcomm.com [10.64.75.246]) by APTAIPPMTA02.qualcomm.com (PPS) with ESMTPS id 54R7KeYA009564 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 27 May 2025 07:20:41 +0000 Received: by cse-cd02-lnx.ap.qualcomm.com (Postfix, from userid 4438065) id 7DBC53504; Tue, 27 May 2025 15:20:39 +0800 (CST) From: Ziyue Zhang To: lpieralisi@kernel.org, kwilczynski@kernel.org, manivannan.sadhasivam@linaro.org, robh@kernel.org, bhelgaas@google.com, krzk+dt@kernel.org, neil.armstrong@linaro.org, abel.vesa@linaro.org, kw@linux.com, conor+dt@kernel.org, vkoul@kernel.org, kishon@kernel.org, andersson@kernel.org, konradybcio@kernel.org Cc: linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, quic_qianyu@quicinc.com, quic_krichai@quicinc.com, quic_vbadigan@quicinc.com, Konrad Dybcio , Ziyue Zhang Subject: [PATCH v5 4/4] arm64: dts: qcom: qcs615-ride: Enable PCIe interface Date: Tue, 27 May 2025 15:20:36 +0800 Message-Id: <20250527072036.3599076-5-quic_ziyuzhan@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250527072036.3599076-1-quic_ziyuzhan@quicinc.com> References: <20250527072036.3599076-1-quic_ziyuzhan@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: OVnjQVHlcmkPB_CervXwcnv5B6Zq7etl X-Proofpoint-ORIG-GUID: OVnjQVHlcmkPB_CervXwcnv5B6Zq7etl X-Authority-Analysis: v=2.4 cv=X8FSKHTe c=1 sm=1 tr=0 ts=683567cd cx=c_pps a=nuhDOHQX5FNHPW3J6Bj6AA==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=dt9VzEwgFbYA:10 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=3zbVK_edIv7hY8gRkFcA:9 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNTI3MDA1OCBTYWx0ZWRfX/q7qZyXk1KM8 169iDeVgVQL3qIuEA0v5xi+ty9cBA4DGzSD84m7aYm4oYgniaxbn8JZ7cERgx1X5PzIMf/wdHKe ANLZtOHne9SP31mhMcuPbv9qIO2vkLD4f4ktEVWZ5BNOC6OrjNqKuZBXXoZqYAV+3WvJslneTI4 8rC82T5gKNa1augjU5+ExUG5EWO43ltUdEWgwTxOp/gPtPtk2ZVG5xZLbRu5XBJu8AdSENGMlvS stAcQnZSgGI8mzGA2K4jGdkkFsp5KJ3Zr/aic9voaCB+P7CXxYmcH1BDAfUY+cE8s0Kml/L30iM WrhK3f3bgDI4iGfm85b8a5mvtaJdYEHuvHVv+QL8iReVq4ofoZRT4BzDZ+yeQZ1bLPlzYUidhYl K3r6I7ZYNOIn13swJhHIbIK2JT3Ngp3keJo4AiU+hEenykEcbMIzdBY+S0Y+VeOdKUnNT9K6 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-05-27_03,2025-05-26_02,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 suspectscore=0 phishscore=0 bulkscore=0 mlxlogscore=999 mlxscore=0 clxscore=1011 priorityscore=1501 spamscore=0 adultscore=0 malwarescore=0 lowpriorityscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505160000 definitions=main-2505270058 From: Krishna chaitanya chundru Add platform configurations in devicetree for PCIe, board related gpios, PMIC regulators, etc. Reviewed-by: Konrad Dybcio Signed-off-by: Krishna chaitanya chundru Signed-off-by: Ziyue Zhang --- arch/arm64/boot/dts/qcom/qcs615-ride.dts | 42 ++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts/qcom/qcs615-ride.dts index 2b5aa3c66867..c59647e5f2d6 100644 --- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts +++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts @@ -217,6 +217,23 @@ &gcc { <&sleep_clk>; }; +&pcie { + perst-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 100 GPIO_ACTIVE_HIGH>; + + pinctrl-0 = <&pcie_default_state>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&pcie_phy { + vdda-phy-supply = <&vreg_l5a>; + vdda-pll-supply = <&vreg_l12a>; + + status = "okay"; +}; + &pm8150_gpios { usb2_en: usb2-en-state { pins = "gpio10"; @@ -244,6 +261,31 @@ &rpmhcc { clocks = <&xo_board_clk>; }; +&tlmm { + pcie_default_state: pcie-default-state { + clkreq-pins { + pins = "gpio90"; + function = "pcie_clk_req"; + drive-strength = <2>; + bias-pull-up; + }; + + perst-pins { + pins = "gpio101"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + wake-pins { + pins = "gpio100"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; +}; + &sdhc_1 { pinctrl-0 = <&sdc1_state_on>; pinctrl-1 = <&sdc1_state_off>;