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Wed, 14 May 2025 05:23:48 GMT Received: from hu-lxu5-sha.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 13 May 2025 22:23:45 -0700 From: Ling Xu To: , , , , , , , , , , Subject: [PATCH 3/3] arm64: dts: qcom: sc7280: Add dma-coherent property for fastrpc nodes Date: Wed, 14 May 2025 10:53:23 +0530 Message-ID: <20250514052323.3881600-4-quic_lxu5@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250514052323.3881600-1-quic_lxu5@quicinc.com> References: <20250514052323.3881600-1-quic_lxu5@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNTE0MDA0NSBTYWx0ZWRfXyrEGWJC746KJ wbElJtGClg5UwxaP2sV2fhkDKYP/7KAigm/6A2XSfy7PXFCN/u9nmGYyFinWCiz5fklOX7EI/Yu pR9IEW4eiTp+I2Y+M+Wim1e2zH9VHO5FMfEfCA2r0PIqsb+G8t9ix/y/wnKkngn/SQSLuJnvzBl pbIHOvN2DRux/gB96u1lVtRIBR/T9iGOvsTyaeDXI23itcI28/HMpQNX+Qa31SLc/hlNL0zaWFk pjX3TINc4rSiD8Y+EmJpp/6vvVgZuSp24x0kMmCcwIOO27eZW3oMZ2igIjOtwhgnzKY2ACOBmk8 1DNK9koPQLbIMY8hFTm8KHSNhfmJBhM0YOoBvG53hnx5/h4MYg215R3dkAdnJcthGjJgHdmt46W /ePbqElPQxs8cEH6BXFs2X2xajo/WX1otarrZ9AF+A+negVvoeq4nZanKjqf+jueuzby3sI+ X-Authority-Analysis: v=2.4 cv=G5scE8k5 c=1 sm=1 tr=0 ts=682428e4 cx=c_pps a=JYp8KDb2vCoCEuGobkYCKw==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=GEpy-HfZoHoA:10 a=dt9VzEwgFbYA:10 a=COk6AnOGAAAA:8 a=YsOEayTiMQgu7miS1LcA:9 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: JkXYPA0pP8maoZLXMzpdpnKkmuJSWwY6 X-Proofpoint-ORIG-GUID: JkXYPA0pP8maoZLXMzpdpnKkmuJSWwY6 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-05-14_01,2025-05-09_01,2025-02-21_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 mlxlogscore=733 clxscore=1015 phishscore=0 bulkscore=0 suspectscore=0 spamscore=0 impostorscore=0 lowpriorityscore=0 mlxscore=0 malwarescore=0 adultscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505070000 definitions=main-2505140045 Add dma-cherent property to fastrpc context bank nodes to ensure that the DMA operations for these nodes are coherent. Signed-off-by: Ling Xu --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 8c04f3471554..70ca57f94624 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -3880,12 +3880,14 @@ compute-cb@3 { compatible = "qcom,fastrpc-compute-cb"; reg = <3>; iommus = <&apps_smmu 0x1803 0x0>; + dma-coherent; }; compute-cb@4 { compatible = "qcom,fastrpc-compute-cb"; reg = <4>; iommus = <&apps_smmu 0x1804 0x0>; + dma-coherent; }; compute-cb@5 { @@ -3893,6 +3895,7 @@ compute-cb@5 { reg = <5>; iommus = <&apps_smmu 0x1805 0x0>; qcom,nsessions = <5>; + dma-coherent; }; }; }; @@ -4120,6 +4123,7 @@ compute-cb@1 { reg = <1>; iommus = <&apps_smmu 0x11a1 0x0420>, <&apps_smmu 0x1181 0x0420>; + dma-coherent; }; compute-cb@2 { @@ -4127,6 +4131,7 @@ compute-cb@2 { reg = <2>; iommus = <&apps_smmu 0x11a2 0x0420>, <&apps_smmu 0x1182 0x0420>; + dma-coherent; }; compute-cb@3 { @@ -4134,6 +4139,7 @@ compute-cb@3 { reg = <3>; iommus = <&apps_smmu 0x11a3 0x0420>, <&apps_smmu 0x1183 0x0420>; + dma-coherent; }; compute-cb@4 { @@ -4141,6 +4147,7 @@ compute-cb@4 { reg = <4>; iommus = <&apps_smmu 0x11a4 0x0420>, <&apps_smmu 0x1184 0x0420>; + dma-coherent; }; compute-cb@5 { @@ -4148,6 +4155,7 @@ compute-cb@5 { reg = <5>; iommus = <&apps_smmu 0x11a5 0x0420>, <&apps_smmu 0x1185 0x0420>; + dma-coherent; }; compute-cb@6 { @@ -4155,6 +4163,7 @@ compute-cb@6 { reg = <6>; iommus = <&apps_smmu 0x11a6 0x0420>, <&apps_smmu 0x1186 0x0420>; + dma-coherent; }; compute-cb@7 { @@ -4162,6 +4171,7 @@ compute-cb@7 { reg = <7>; iommus = <&apps_smmu 0x11a7 0x0420>, <&apps_smmu 0x1187 0x0420>; + dma-coherent; }; compute-cb@8 { @@ -4169,6 +4179,7 @@ compute-cb@8 { reg = <8>; iommus = <&apps_smmu 0x11a8 0x0420>, <&apps_smmu 0x1188 0x0420>; + dma-coherent; }; /* note: secure cb9 in downstream */ @@ -4178,6 +4189,7 @@ compute-cb@11 { reg = <11>; iommus = <&apps_smmu 0x11ab 0x0420>, <&apps_smmu 0x118b 0x0420>; + dma-coherent; }; compute-cb@12 { @@ -4185,6 +4197,7 @@ compute-cb@12 { reg = <12>; iommus = <&apps_smmu 0x11ac 0x0420>, <&apps_smmu 0x118c 0x0420>; + dma-coherent; }; compute-cb@13 { @@ -4192,6 +4205,7 @@ compute-cb@13 { reg = <13>; iommus = <&apps_smmu 0x11ad 0x0420>, <&apps_smmu 0x118d 0x0420>; + dma-coherent; }; compute-cb@14 { @@ -4199,6 +4213,7 @@ compute-cb@14 { reg = <14>; iommus = <&apps_smmu 0x11ae 0x0420>, <&apps_smmu 0x118e 0x0420>; + dma-coherent; }; }; };