From patchwork Fri May 2 10:15:48 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: George Moussalem via B4 Relay X-Patchwork-Id: 887603 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CA78B23C4F8; Fri, 2 May 2025 10:15:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746180949; cv=none; b=uVqSANqaqHaLONub7zadX9PjgFy2wJSgFVVbz7YiQk5fxZSdvtA/eGbBYH4s9qB1swlsA1TY4ca2DJS/9w7VQ0PK3bpeCqkT8zQtduE8uHFwQAI93Py0bgzzZNl97iM8NtZftsOH+MA5BcvlIqukGyHGP+GFZW3wRSovEYw+wwE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746180949; c=relaxed/simple; bh=GNNkjEXjixDEFRou+UGsnQuwh82DaXrunosdKnJxIpw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=KSIX5+32RU7g2w7XGBRNA3E4xa3H4NMY5CLTE6WDppHqF9xL1n6gdsyMdcj6pBVuBd6dRd7zDC59ifWNd1kQrEsU2tirjKb3QuvHQuu4AfVJVxZpBGdrjg7QJ7RRyAfYlqI8d3d5c3jyq4TxizY+kyuQuAYktzEGQExnKLbS3Wg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Y0M1ec8I; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Y0M1ec8I" Received: by smtp.kernel.org (Postfix) with ESMTPS id 2E38CC4CEFD; Fri, 2 May 2025 10:15:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1746180949; bh=GNNkjEXjixDEFRou+UGsnQuwh82DaXrunosdKnJxIpw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=Y0M1ec8I1RCkMCButUNlSzGNaceMSfdPCAuJP4v7ZnBWBfvhRnN3L3+OR0RvPbn4N nVfV5/N5Kr2cXWYrcqqADX0UkZ+t7yGf940kEbnvqQezmvcmnbVuNpcHI8cj+KMXbj Wm3Z736D9izkaSYsdJ1x0Rn0EI+YFnSj6EBBu3PPcOfJ45dEg9+f5jCEJ5q+S/+pS/ I9F6LzaHsQV8QDyGd6lc/i/svtI6PEuVTqVmxX5zr0EkGySlWpJQLsWeQ2ZLO9c8Pd a+R/zVNajFIDr7sPUH0UKeXnmk85NqG7zvOG2u5XgoIWGlxdlL4OZgpqyLZSR6DEc4 sbcfFDfW+Xi7w== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 27DC6C3ABAA; Fri, 2 May 2025 10:15:49 +0000 (UTC) From: George Moussalem via B4 Relay Date: Fri, 02 May 2025 14:15:48 +0400 Subject: [PATCH 6/6] arm64: dts: qcom: Update IPQ5018 xo_board_clk to use fixed factor clock Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250502-ipq5018-cmn-pll-v1-6-27902c1c4071@outlook.com> References: <20250502-ipq5018-cmn-pll-v1-0-27902c1c4071@outlook.com> In-Reply-To: <20250502-ipq5018-cmn-pll-v1-0-27902c1c4071@outlook.com> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Luo Jie , Lee Jones , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, George Moussalem X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1746180946; l=1998; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=LxxatdRb90i4on9YIidoVQJCRrrcChIjg+ks5OFGzsg=; b=qCfczu/hRv/nE0TSXTdWP0CI16lOIV3RTDfLOzPPumJyG3yT7ydLhYyjcaXLKICiDDgcr+qFA CdI3ZL5c5YuCAHgmMJF6Tl86pdjVRSigL5rd0vjWq6ufBaUyD7sh4aL X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem The xo_board_clk is fixed to 24 MHZ, which is routed from WiFi output clock 96 MHZ (also being the reference clock of CMN PLL) divided by 4 to the analog block routing channel. Signed-off-by: George Moussalem --- arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts | 3 ++- arch/arm64/boot/dts/qcom/ipq5018-tplink-archer-ax55-v1.dts | 3 ++- arch/arm64/boot/dts/qcom/ipq5018.dtsi | 3 ++- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts b/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts index 8460b538eb6a3e2d6b971bd9637309809e0c0f0c..abb629678c023a2eb387ebf229f6dd1c30133b19 100644 --- a/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts +++ b/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts @@ -80,5 +80,6 @@ &usbphy0 { }; &xo_board_clk { - clock-frequency = <24000000>; + clock-div = <4>; + clock-mult = <1>; }; diff --git a/arch/arm64/boot/dts/qcom/ipq5018-tplink-archer-ax55-v1.dts b/arch/arm64/boot/dts/qcom/ipq5018-tplink-archer-ax55-v1.dts index 5bb021cb29cd39cb95035bfac1bdbc976439838b..7a25af57749c8e8c9a6a185437886b04b0d99e8e 100644 --- a/arch/arm64/boot/dts/qcom/ipq5018-tplink-archer-ax55-v1.dts +++ b/arch/arm64/boot/dts/qcom/ipq5018-tplink-archer-ax55-v1.dts @@ -124,5 +124,6 @@ uart_pins: uart-pins-state { }; &xo_board_clk { - clock-frequency = <24000000>; + clock-div = <4>; + clock-mult = <1>; }; diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi index 78368600ba44825b38f737a6d7837a80dc32efb6..7e40f80e4795de25d55b5a19c1beb98e5abcdef3 100644 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi @@ -31,7 +31,8 @@ sleep_clk: sleep-clk { }; xo_board_clk: xo-board-clk { - compatible = "fixed-clock"; + compatible = "fixed-factor-clock"; + clocks = <&ref_96mhz_clk>; #clock-cells = <0>; };