From patchwork Fri Mar 21 12:14:42 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: George Moussalem via B4 Relay X-Patchwork-Id: 875283 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BE036226CF8; Fri, 21 Mar 2025 12:14:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742559286; cv=none; b=nIFpKr/da3+NUGh4Nct9Zw65Hk9JEZf1QWdrf87HvjBGgGb48WQRpggUIMbq0xAXD9KwzkKXAkOqkWOgWghxd77zxBMLPFTgz1zAH6fVFSqkTUsNQ4l65GiusRXCECABtUTMLpcfWwP+/tJnQWyHfveN8BPJDznJUgUaGehRBBs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742559286; c=relaxed/simple; bh=tlVg37QeIwq/BVXEmQZGCinc72LFFyHRz41tzUQAGsk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=megIwCCB1BPVOy1a7mcP9FbmGurmcPaw1s4WfIyAD1QDpM9FBSTZNTN2Eg82svPJR/THB/NIIzcYD9fzvpN6HdeXNoiTSYhv5akL96VUbTPCO5kgCeXWvJQYWn7p0n845FMdIHw04kZk0/PUGXsDQk9HCzjv+jVLkAqqCgYOycg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ugqSrHxw; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ugqSrHxw" Received: by smtp.kernel.org (Postfix) with ESMTPS id 3066CC4AF0E; Fri, 21 Mar 2025 12:14:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1742559286; bh=tlVg37QeIwq/BVXEmQZGCinc72LFFyHRz41tzUQAGsk=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=ugqSrHxwo/6a1tVHleGY3nC+etdXs973UCba8ZVuTVRWa3Kv7hRP43XkQR5CxYgkV xwmkv8Z0sPhlTbvM8TLWoBFarjQhD1ksTRAfsa0yqPXlCfucn7PCLnY4WSmFHRu9lW XaO6Tqe49eZYxfwh/P2WaBkSR5S9Jov9qnGWQzqIw3YlZLSy4rGd8qAvFDukjtb21A XRsBbBWu5bDcLC39RnBmTQ5OEZ4+wKZZ8aA2TJbpAhOaBEe3uT6QBc+lRHCE3iIPGy of93qi6WN538qYaMPezctlWD0P6iHe7BjScbw/IYdjsuQKabGNZE8wnMqpEKFDRvC6 j79e0R5O74rtQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26E00C36000; Fri, 21 Mar 2025 12:14:46 +0000 (UTC) From: George Moussalem via B4 Relay Date: Fri, 21 Mar 2025 16:14:42 +0400 Subject: [PATCH v6 4/6] PCI: qcom: Add support for IPQ5018 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250321-ipq5018-pcie-v6-4-b7d659a76205@outlook.com> References: <20250321-ipq5018-pcie-v6-0-b7d659a76205@outlook.com> In-Reply-To: <20250321-ipq5018-pcie-v6-0-b7d659a76205@outlook.com> To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Nitheesh Sekar , Varadarajan Narayanan , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Manivannan Sadhasivam , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, George Moussalem , 20250317100029.881286-2-quic_varada@quicinc.com, Sricharan R X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1742559282; l=1329; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=hdHPuZTrjBVTUJ6XMbo2uB5TbhhbWj1SbVqmNl1k/ZI=; b=dloC34ddXrnoi0F8aDwk0mIJUdN94t02LuAxYGJ234hUjg9zq8BOlPIv2wRTksRnqwNtSno1p o00oz5MFbryBAtC8LfHJYwkdFqDTVm5y1/WK6Q+IZ6JE3DH59nh+GGY X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: Nitheesh Sekar Add IPQ5018 platform with is based on Qcom IP rev. 2.9.0 and Synopsys IP rev. 5.00a. The platform itself has two PCIe Gen2 controllers: one single-lane and one dual-lane. So let's add the IPQ5018 compatible and re-use 2_9_0 ops. Reviewed-by: Manivannan Sadhasivam Signed-off-by: Nitheesh Sekar Signed-off-by: Sricharan R Signed-off-by: George Moussalem --- drivers/pci/controller/dwc/pcie-qcom.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index dc98ae63362d..e91bbe218569 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -1840,6 +1840,7 @@ static const struct of_device_id qcom_pcie_match[] = { { .compatible = "qcom,pcie-apq8064", .data = &cfg_2_1_0 }, { .compatible = "qcom,pcie-apq8084", .data = &cfg_1_0_0 }, { .compatible = "qcom,pcie-ipq4019", .data = &cfg_2_4_0 }, + { .compatible = "qcom,pcie-ipq5018", .data = &cfg_2_9_0 }, { .compatible = "qcom,pcie-ipq6018", .data = &cfg_2_9_0 }, { .compatible = "qcom,pcie-ipq8064", .data = &cfg_2_1_0 }, { .compatible = "qcom,pcie-ipq8064-v2", .data = &cfg_2_1_0 },