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Thu, 13 Mar 2025 13:10:03 GMT Received: from hu-kaushalk-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 13 Mar 2025 06:09:58 -0700 From: Kaushal Kumar To: , , , , , , , , , , CC: , , , , , Kaushal Kumar Subject: [PATCH 1/6] dt-bindings: mtd: qcom,nandc: Document the SDX75 NAND Date: Thu, 13 Mar 2025 18:39:13 +0530 Message-ID: <20250313130918.4238-2-quic_kaushalk@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250313130918.4238-1-quic_kaushalk@quicinc.com> References: <20250313130918.4238-1-quic_kaushalk@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: rfgKCddoWgJMhbTu7oN301xM7z9HAIbj X-Authority-Analysis: v=2.4 cv=DNSP4zNb c=1 sm=1 tr=0 ts=67d2d92d cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=GEpy-HfZoHoA:10 a=Vs1iUdzkB0EA:10 a=COk6AnOGAAAA:8 a=Kq_rJIWMMWslwROvJEYA:9 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: rfgKCddoWgJMhbTu7oN301xM7z9HAIbj X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1093,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-13_06,2025-03-11_02,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 clxscore=1011 phishscore=0 malwarescore=0 mlxlogscore=999 priorityscore=1501 mlxscore=0 spamscore=0 bulkscore=0 impostorscore=0 suspectscore=0 adultscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2503130103 Document the QPIC NAND controller v2.1.1 being used in SDX75 SoC and it uses BAM DMA. SDX75 NAND controller has DMA-coherent and iommu support so define them in the properties section, without which 'dtbs_check' reports the following error: nand-controller@1cc8000: Unevaluated properties are not allowed ('dma-coherent', 'iommus' were unexpected) Signed-off-by: Kaushal Kumar --- .../devicetree/bindings/mtd/qcom,nandc.yaml | 23 ++++++++++++++----- 1 file changed, 17 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml b/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml index 35b4206ea918..8b77e8837205 100644 --- a/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml +++ b/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml @@ -11,12 +11,17 @@ maintainers: properties: compatible: - enum: - - qcom,ipq806x-nand - - qcom,ipq4019-nand - - qcom,ipq6018-nand - - qcom,ipq8074-nand - - qcom,sdx55-nand + OneOf: + - items: + - enum: + - qcom,sdx75-nand + - const: qcom,sdx55-nand + - items: + - const: qcom,ipq806x-nand + - const: qcom,ipq4019-nand + - const: qcom,ipq6018-nand + - const: qcom,ipq8074-nand + - const: qcom,sdx55-nand reg: maxItems: 1 @@ -31,6 +36,12 @@ properties: - const: core - const: aon + dma-coherent: true + + iommus: + minItems: 1 + maxItems: 3 + qcom,cmd-crci: $ref: /schemas/types.yaml#/definitions/uint32 description: