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Mon, 03 Feb 2025 05:23:22 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38c5c0ece21sm12570858f8f.20.2025.02.03.05.23.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Feb 2025 05:23:21 -0800 (PST) From: Neil Armstrong Date: Mon, 03 Feb 2025 14:23:17 +0100 Subject: [PATCH v4 1/4] arm64: dts: qcom: sm8650: drop cpu thermal passive trip points Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250203-topic-sm8650-thermal-cpu-idle-v4-1-65e35f307301@linaro.org> References: <20250203-topic-sm8650-thermal-cpu-idle-v4-0-65e35f307301@linaro.org> In-Reply-To: <20250203-topic-sm8650-thermal-cpu-idle-v4-0-65e35f307301@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE On the SM8650, the dynamic clock and voltage scaling (DCVS) is done in an hardware controlled loop using the LMH and EPSS blocks with constraints and OPPs programmed in the board firmware. Since the Hardware does a better job at maintaining the CPUs temperature in an acceptable range by taking in account more parameters like the die characteristics or other factory fused values, it makes no sense to try and reproduce a similar set of constraints with the Linux cpufreq thermal core. In addition, the tsens IP is responsible for monitoring the temperature across the SoC and the current settings will heavily trigger the tsens UP/LOW interrupts if the CPU temperatures reaches the hardware thermal constraints which are currently defined in the DT. And since the CPUs are not hooked in the thermal trip points, the potential interrupts and calculations are a waste of system resources. Drop the current passive trip points and only leave the critical trip point that will trigger a software system reboot before an hardware thermal shutdown in the allmost impossible case the hardware DCVS cannot handle the temperature surge. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 180 ----------------------------------- 1 file changed, 180 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index 25e47505adcb790d09f1d2726386438487255824..95509ce2713d4fcc3dbe0c5cd5827312d5681af4 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -5751,18 +5751,6 @@ cpu2-top-thermal { thermal-sensors = <&tsens0 5>; trips { - trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "passive"; - }; - - trip-point1 { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu2-critical { temperature = <110000>; hysteresis = <1000>; @@ -5775,18 +5763,6 @@ cpu2-bottom-thermal { thermal-sensors = <&tsens0 6>; trips { - trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "passive"; - }; - - trip-point1 { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu2-critical { temperature = <110000>; hysteresis = <1000>; @@ -5799,18 +5775,6 @@ cpu3-top-thermal { thermal-sensors = <&tsens0 7>; trips { - trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "passive"; - }; - - trip-point1 { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu3-critical { temperature = <110000>; hysteresis = <1000>; @@ -5823,18 +5787,6 @@ cpu3-bottom-thermal { thermal-sensors = <&tsens0 8>; trips { - trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "passive"; - }; - - trip-point1 { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu3-critical { temperature = <110000>; hysteresis = <1000>; @@ -5847,18 +5799,6 @@ cpu4-top-thermal { thermal-sensors = <&tsens0 9>; trips { - trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "passive"; - }; - - trip-point1 { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu4-critical { temperature = <110000>; hysteresis = <1000>; @@ -5871,18 +5811,6 @@ cpu4-bottom-thermal { thermal-sensors = <&tsens0 10>; trips { - trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "passive"; - }; - - trip-point1 { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu4-critical { temperature = <110000>; hysteresis = <1000>; @@ -5895,18 +5823,6 @@ cpu5-top-thermal { thermal-sensors = <&tsens0 11>; trips { - trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "passive"; - }; - - trip-point1 { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu5-critical { temperature = <110000>; hysteresis = <1000>; @@ -5919,18 +5835,6 @@ cpu5-bottom-thermal { thermal-sensors = <&tsens0 12>; trips { - trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "passive"; - }; - - trip-point1 { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu5-critical { temperature = <110000>; hysteresis = <1000>; @@ -5943,18 +5847,6 @@ cpu6-top-thermal { thermal-sensors = <&tsens0 13>; trips { - trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "passive"; - }; - - trip-point1 { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu6-critical { temperature = <110000>; hysteresis = <1000>; @@ -5967,18 +5859,6 @@ cpu6-bottom-thermal { thermal-sensors = <&tsens0 14>; trips { - trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "passive"; - }; - - trip-point1 { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu6-critical { temperature = <110000>; hysteresis = <1000>; @@ -6009,18 +5889,6 @@ cpu7-top-thermal { thermal-sensors = <&tsens1 1>; trips { - trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "passive"; - }; - - trip-point1 { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu7-critical { temperature = <110000>; hysteresis = <1000>; @@ -6033,18 +5901,6 @@ cpu7-middle-thermal { thermal-sensors = <&tsens1 2>; trips { - trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "passive"; - }; - - trip-point1 { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu7-critical { temperature = <110000>; hysteresis = <1000>; @@ -6057,18 +5913,6 @@ cpu7-bottom-thermal { thermal-sensors = <&tsens1 3>; trips { - trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "passive"; - }; - - trip-point1 { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu7-critical { temperature = <110000>; hysteresis = <1000>; @@ -6081,18 +5925,6 @@ cpu0-thermal { thermal-sensors = <&tsens1 4>; trips { - trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "passive"; - }; - - trip-point1 { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu0-critical { temperature = <110000>; hysteresis = <1000>; @@ -6105,18 +5937,6 @@ cpu1-thermal { thermal-sensors = <&tsens1 5>; trips { - trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "passive"; - }; - - trip-point1 { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu1-critical { temperature = <110000>; hysteresis = <1000>;