From patchwork Wed Jan 29 21:23:27 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Minnekhanov X-Patchwork-Id: 860685 Received: from out-175.mta0.migadu.com (out-175.mta0.migadu.com [91.218.175.175]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BD8901E1A20 for ; Wed, 29 Jan 2025 21:24:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.175 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738185885; cv=none; b=XkI8/4mic4ovS57UUb80ykwoihWo0COuLaXQ+W3B9FbIWA8v404FCu9lVt7CQ4fY8xZxuB/xc1RyV3gVgP69DIjTkrmB48NsuDY7SpE7G1T0zABpBHhBg8rA7NXtPgH7tAw3B0C9VJWuTmHSurpzsN0VkfazoAl1sg7VQ0rNnos= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738185885; c=relaxed/simple; bh=FW/GI43N5p3BtB1D64rBvqr5odB3+1/4Ea0iYxTd780=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=OGPtLtokSM18fmzO48I9lxqgMsfWwh7nPndC+HEfRty0IIErrYZlcag6WKu6FlglAG9PsQh683c7ywfMrUQwd7xGRb1+gFGjLsJcP01Vui5cx/c1GyR7nzGuFv4+Qt9IaRh4ngyBCUkfGxXU31A1bnXLgOsKDPCxK8tzYqqZV7Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=postmarketos.org; spf=pass smtp.mailfrom=postmarketos.org; dkim=pass (2048-bit key) header.d=postmarketos.org header.i=@postmarketos.org header.b=dQ4+MkRR; arc=none smtp.client-ip=91.218.175.175 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=postmarketos.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=postmarketos.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=postmarketos.org header.i=@postmarketos.org header.b="dQ4+MkRR" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=postmarketos.org; s=key1; t=1738185877; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=m8dAhViTZBchMGhqpRD9jGMu8g0CRLVsIwsVjBG5aSo=; b=dQ4+MkRRBxQSBfoVVGIDP4JEyg/hfzUBmdP1unT+/qGRtW+ngU4EQ2ZRevX11o0mBVVYCR v0/kFJL8fntI1flFeV8qwOcGrwvUVIcX3hFx9GAzAskwYhcvDjZYS9fDRRpZrMAXNghK3U hGM7Fye5tHO1ITzT2068Iw60HLf+54Uiqt9gk7wLZbPYWT81dNlMB4vlxt8XNKtftunHvT EjYIjyAmnuKnmvi/U2Sek6VtMSCfG2+H/2oiMtknZj7B/KtBJqy19j/8I4MRMLmnY0dFcR hATbDS5qnZxDe6JrK7c5wVKwazie25/MF+rxxOenaHCbl2k3pOQj2SuH7Hu9pQ== From: Alexey Minnekhanov To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Alexey Minnekhanov Subject: [PATCH v2 3/3] arm64: dts: qcom: sdm630: Add missing resets to mmc blocks Date: Thu, 30 Jan 2025 00:23:27 +0300 Message-ID: <20250129212328.1627891-3-alexeymin@postmarketos.org> In-Reply-To: <20250129212328.1627891-1-alexeymin@postmarketos.org> References: <20250129212328.1627891-1-alexeymin@postmarketos.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT Add resets to eMMC/SD card blocks so linux can properly reset them during initialization. Signed-off-by: Alexey Minnekhanov --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index a2c079bac1a7..3722e405a97c 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -1379,6 +1379,7 @@ sdhc_2: mmc@c084000 { <&xo_board>; clock-names = "iface", "core", "xo"; + resets = <&gcc GCC_SDCC2_BCR>; interconnects = <&a2noc 3 &a2noc 10>, <&gnoc 0 &cnoc 28>; @@ -1433,6 +1434,8 @@ sdhc_1: mmc@c0c4000 { <&gcc GCC_SDCC1_ICE_CORE_CLK>; clock-names = "iface", "core", "xo", "ice"; + resets = <&gcc GCC_SDCC1_BCR>; + interconnects = <&a2noc 2 &a2noc 10>, <&gnoc 0 &cnoc 27>; interconnect-names = "sdhc-ddr", "cpu-sdhc";