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[2/6] dt-bindings: phy: qcom,qmp-pcie: Drop reset number constraints

Message ID 20250125-topic-x1p4_dts-v1-2-02659a08b044@oss.qualcomm.com
State New
Headers show
Series X1P42100 DT and PCIe PHY bits | expand

Commit Message

Konrad Dybcio Jan. 25, 2025, 3:31 a.m. UTC 
From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

(Almost?) all QMP PHYs come with both a "full reset" ("phy") and a
"retain certain registers" one ("phy_nocsr").

Drop the maxItems=1 constraint for resets and reset_names as we go
ahead and straighten out the DT usage. After that's done (which
will involve modifying some clock drivers etc.), we may set
*min*Items to 2, bar some possible exceptions.

Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
 .../bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml   | 24 ----------------------
 1 file changed, 24 deletions(-)
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
index f1ffc3d5cae44b8a9c96cdcd749a6e54533c94f6..c42143bd139e30d1beabc9099d0dde17128413bf 100644
--- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
@@ -204,30 +204,6 @@  allOf:
         clock-names:
           minItems: 7
 
-  - if:
-      properties:
-        compatible:
-          contains:
-            enum:
-              - qcom,sm8550-qmp-gen4x2-pcie-phy
-              - qcom,sm8650-qmp-gen4x2-pcie-phy
-              - qcom,x1e80100-qmp-gen4x2-pcie-phy
-              - qcom,x1e80100-qmp-gen4x4-pcie-phy
-              - qcom,x1e80100-qmp-gen4x8-pcie-phy
-              - qcom,x1p42100-qmp-gen4x4-pcie-phy
-    then:
-      properties:
-        resets:
-          minItems: 2
-        reset-names:
-          minItems: 2
-    else:
-      properties:
-        resets:
-          maxItems: 1
-        reset-names:
-          maxItems: 1
-
   - if:
       properties:
         compatible: