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Tue, 24 Dec 2024 02:17:22 -0800 (PST) From: Dmitry Baryshkov Date: Tue, 24 Dec 2024 12:17:05 +0200 Subject: [PATCH v3 06/21] arm64: dts: qcom: qrb4210-rb2: correct sleep clock frequency Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241224-fix-board-clocks-v3-6-e9b08fbeadd3@linaro.org> References: <20241224-fix-board-clocks-v3-0-e9b08fbeadd3@linaro.org> In-Reply-To: <20241224-fix-board-clocks-v3-0-e9b08fbeadd3@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Leo Yan , Georgi Djakov , Shawn Guo , Stephan Gerhold , Zac Crosby , =?utf-8?q?Bastian_K=C3=B6cher?= , Jeremy McNicoll , Rohit Agarwal , Melody Olvera , cros-qcom-dts-watchers@chromium.org, Stephen Boyd , Rajendra Nayak , Martin Botka , Jonathan Marek , Vinod Koul , Tengfei Fan , Fenglin Wu , Neil Armstrong , Abel Vesa , Alexandru Marc Serdeliuc , Vladimir Zapolskiy , Sibi Sankar , Bryan O'Donoghue , Jun Nie , Max Chen , Vincent Knecht , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=844; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=Hw/hyP5k8e4mrPZ2Xq4xWEV8pyteJA9D67U7usPU5R4=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBnaoohF+0EqyXF3XrhnjC42zcri0uUzMBsBO5sq GxLB0QYNu6JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ2qKIQAKCRCLPIo+Aiko 1aR+B/9VlaHjXy4L5c+3nik4nOoAAPnAGzM9GaWZnNQGQa0ejWTnISl7NVmGyyhH430xSs+NyTy 3RfMQRBtLC5N87YxR2hLOs5zPLc/1uv8uFa3AFrsD5lvpGo5vrrDxCStYaMbvSu4/68PrRdVOHf 3KZ/bs6S3/nZQl6rEqvREOWdjCG1ywNzIjdbVLVX4XdYQ7Qe/7FPbwme1xm7zXYfIoC6dgkLP/s h0V2DLESNRlxyZheBrMJtCLahrunk2ch9FGse/CW3XRgH1zPhzVwNnZ/tpGmTc5ZsvWtMALCG6p L4oMYMXK/jatz7Oo+NR0qBmBViRuXjIU47UKduQwWRBbxbi/ X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Qualcomm RB2 board uses PM6125 to provide sleep clock. According to the documentation, that clock has 32.7645 kHz frequency. Correct the sleep clock definition. Fixes: 8d58a8c0d930 ("arm64: dts: qcom: Add base qrb4210-rb2 board dts") Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts index a9540e92d3e6fc314fa91d4f055325680233f6c4..d8d4cff7d5abed405d1b4cdf9ab8264aab076830 100644 --- a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts +++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts @@ -545,7 +545,7 @@ can@0 { }; &sleep_clk { - clock-frequency = <32000>; + clock-frequency = <32764>; }; &tlmm {