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Tue, 24 Dec 2024 02:17:50 -0800 (PST) From: Dmitry Baryshkov Date: Tue, 24 Dec 2024 12:17:16 +0200 Subject: [PATCH v3 17/21] arm64: dts: qcom: sm8650: correct sleep clock frequency Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241224-fix-board-clocks-v3-17-e9b08fbeadd3@linaro.org> References: <20241224-fix-board-clocks-v3-0-e9b08fbeadd3@linaro.org> In-Reply-To: <20241224-fix-board-clocks-v3-0-e9b08fbeadd3@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Leo Yan , Georgi Djakov , Shawn Guo , Stephan Gerhold , Zac Crosby , =?utf-8?q?Bastian_K=C3=B6cher?= , Jeremy McNicoll , Rohit Agarwal , Melody Olvera , cros-qcom-dts-watchers@chromium.org, Stephen Boyd , Rajendra Nayak , Martin Botka , Jonathan Marek , Vinod Koul , Tengfei Fan , Fenglin Wu , Neil Armstrong , Abel Vesa , Alexandru Marc Serdeliuc , Vladimir Zapolskiy , Sibi Sankar , Bryan O'Donoghue , Jun Nie , Max Chen , Vincent Knecht , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1965; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=k6VUs1ScFCdCh+SFXZEEGEWQ1wMPimPue9P3iT/F5+E=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBnaooi4JbQ9qoMYHTPz6/B+ss1zW0Z0TZr54dx6 ApifhuCgNqJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ2qKIgAKCRCLPIo+Aiko 1aHPB/0fHqSZUYDtdKTHNvB7niV4Y48sLLPWpgxlxEGbqe4AzyPIcNipiJPyUzxGhQ8azo/SudL u3LPKCa4hWKWte720ttZXLwnSczS2QpiGwLrtUqLtiBbaN0XKnNRegp4NGvbWSTpW0EV6K51E5Q WmUZ5+LepC14bCNF3Xe+LhSAGdPEF4sObMUbRpNZCj1v/Om7UURpGI5bXxR/V//uXCeKRD9TVjr EsmZYbVlnZT3rtk+rHegHQv6rQTvmUJITaQXMhZw10qhZ7B5Bvha7QhqyMcpEhfJMtRux1pad3t G7eQTyne1qc44aZFpd3yWlbxuIFUuNPSKRyxMwB2RWvnh203 X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The SM8650 platform uses PMK8550 to provide sleep clock. According to the documentation, that clock has 32.7645 kHz frequency. Correct the sleep clock definition. Fixes: 6fbdb3c1fac7 ("arm64: dts: qcom: sm8650: add initial SM8650 MTP dts") Fixes: a834911d50c1 ("arm64: dts: qcom: sm8650: add initial SM8650 QRD dts") Fixes: 01061441029e ("arm64: dts: qcom: sm8650: add support for the SM8650-HDK board") Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8650-hdk.dts | 2 +- arch/arm64/boot/dts/qcom/sm8650-mtp.dts | 2 +- arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8650-hdk.dts b/arch/arm64/boot/dts/qcom/sm8650-hdk.dts index f00bdff4280af22f6f8b23e33238f53c602bc169..d0912735b54e5090f9f213c2c9341e03effbbbff 100644 --- a/arch/arm64/boot/dts/qcom/sm8650-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8650-hdk.dts @@ -1113,7 +1113,7 @@ &sdhc_2 { }; &sleep_clk { - clock-frequency = <32000>; + clock-frequency = <32764>; }; &swr0 { diff --git a/arch/arm64/boot/dts/qcom/sm8650-mtp.dts b/arch/arm64/boot/dts/qcom/sm8650-mtp.dts index 0db2cb03f252d19a1f8b171a562a8e06290c8a21..76ef43c10f77d8329ccf0a05c9d590a46372315f 100644 --- a/arch/arm64/boot/dts/qcom/sm8650-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sm8650-mtp.dts @@ -730,7 +730,7 @@ &sdhc_2 { }; &sleep_clk { - clock-frequency = <32000>; + clock-frequency = <32764>; }; &swr0 { diff --git a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts index c5e8c3c2df91a49476f49832c0bd6418f4dfae3d..71033fba21b56bc63620dca3e453c14191739675 100644 --- a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts +++ b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts @@ -1041,7 +1041,7 @@ &remoteproc_mpss { }; &sleep_clk { - clock-frequency = <32000>; + clock-frequency = <32764>; }; &spi4 {